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hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
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hw/pci/Kconfig says MSI_NONBROKEN should be selected by interrupt
controllers regardless of how MSI is implemented. msi_nonbroken is
initialized to true in sifive_plic_realize().

Let SIFIVE_PLIC select MSI_NONBROKEN and drop the selection from
RISC-V machines.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Message-Id: <20221211030829.802437-1-bmeng@tinylab.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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lbmeng authored and alistair23 committed Dec 19, 2022
1 parent f4b6a28 commit 911eb12
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Showing 2 changed files with 1 addition and 5 deletions.
1 change: 1 addition & 0 deletions hw/intc/Kconfig
Expand Up @@ -78,6 +78,7 @@ config RISCV_IMSIC

config SIFIVE_PLIC
bool
select MSI_NONBROKEN

config GOLDFISH_PIC
bool
Expand Down
5 changes: 0 additions & 5 deletions hw/riscv/Kconfig
Expand Up @@ -11,7 +11,6 @@ config MICROCHIP_PFSOC
select MCHP_PFSOC_IOSCB
select MCHP_PFSOC_MMUART
select MCHP_PFSOC_SYSREG
select MSI_NONBROKEN
select RISCV_ACLINT
select SIFIVE_PDMA
select SIFIVE_PLIC
Expand All @@ -37,7 +36,6 @@ config RISCV_VIRT
imply TPM_TIS_SYSBUS
select RISCV_NUMA
select GOLDFISH_RTC
select MSI_NONBROKEN
select PCI
select PCI_EXPRESS_GENERIC_BRIDGE
select PFLASH_CFI01
Expand All @@ -53,7 +51,6 @@ config RISCV_VIRT

config SIFIVE_E
bool
select MSI_NONBROKEN
select RISCV_ACLINT
select SIFIVE_GPIO
select SIFIVE_PLIC
Expand All @@ -64,7 +61,6 @@ config SIFIVE_E
config SIFIVE_U
bool
select CADENCE
select MSI_NONBROKEN
select RISCV_ACLINT
select SIFIVE_GPIO
select SIFIVE_PDMA
Expand All @@ -82,6 +78,5 @@ config SPIKE
bool
select RISCV_NUMA
select HTIF
select MSI_NONBROKEN
select RISCV_ACLINT
select SIFIVE_PLIC

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