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target-mips: Enable access to required RDHWR hardware registers
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While running in the usermode emulator all of the required*
MIPS32r2 RDHWR hardware registers should be accessible (the
Linux kernel enables access to these same registers).  Note
that these registers are still enabled when the MIPS ISA is
not release 2.  This is OK since the Linux kernel emulates
access to them when they are not available in hardware.

* There is also the ULR register which is only recommended
  for full release 2 compliance.  Incidentally, accessing
  this register in the current implementation works fine
  without flipping its access bit.

Signed-off-by: Meador Inge <meadori@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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meadori authored and aurel32 committed Aug 23, 2012
1 parent 58617a7 commit 9415913
Showing 1 changed file with 3 additions and 2 deletions.
5 changes: 3 additions & 2 deletions target-mips/translate.c
Expand Up @@ -12768,8 +12768,9 @@ void cpu_state_reset(CPUMIPSState *env)

#if defined(CONFIG_USER_ONLY)
env->hflags = MIPS_HFLAG_UM;
/* Enable access to the SYNCI_Step register. */
env->CP0_HWREna |= (1 << 1);
/* Enable access to the CPUNum, SYNCI_Step, CC, and CCRes RDHWR
hardware registers. */
env->CP0_HWREna |= 0x0000000F;
if (env->CP0_Config1 & (1 << CP0C1_FP)) {
env->hflags |= MIPS_HFLAG_FPU;
}
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