Skip to content

Commit

Permalink
target/riscv: Generate nanboxed results from fp helpers
Browse files Browse the repository at this point in the history 
Make sure that all results from single-precision scalar helpers
are properly nan-boxed to 64-bits.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Message-Id: <20200724002807.441147-2-richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
  • Loading branch information
@rth7680 @alistair23
rth7680 authored and alistair23 committed Aug 22, 2020
1 parent f86d9a0 commit 9921e3d
Show file tree
Hide file tree
Showing 2 changed files with 28 additions and 19 deletions.
42 changes: 23 additions & 19 deletions target/riscv/fpu_helper.c
View file
Expand Up @@ -81,10 +81,16 @@ void helper_set_rounding_mode(CPURISCVState *env, uint32_t rm)
set_float_rounding_mode(softrm, &env->fp_status);
}

static uint64_t do_fmadd_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
uint64_t frs3, int flags)
{
return nanbox_s(float32_muladd(frs1, frs2, frs3, flags, &env->fp_status));
}

uint64_t helper_fmadd_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
uint64_t frs3)
{
return float32_muladd(frs1, frs2, frs3, 0, &env->fp_status);
return do_fmadd_s(env, frs1, frs2, frs3, 0);
}

uint64_t helper_fmadd_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
Expand All @@ -96,8 +102,7 @@ uint64_t helper_fmadd_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
uint64_t helper_fmsub_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
uint64_t frs3)
{
return float32_muladd(frs1, frs2, frs3, float_muladd_negate_c,
&env->fp_status);
return do_fmadd_s(env, frs1, frs2, frs3, float_muladd_negate_c);
}

uint64_t helper_fmsub_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
Expand All @@ -110,8 +115,7 @@ uint64_t helper_fmsub_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
uint64_t helper_fnmsub_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
uint64_t frs3)
{
return float32_muladd(frs1, frs2, frs3, float_muladd_negate_product,
&env->fp_status);
return do_fmadd_s(env, frs1, frs2, frs3, float_muladd_negate_product);
}

uint64_t helper_fnmsub_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
Expand All @@ -124,8 +128,8 @@ uint64_t helper_fnmsub_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
uint64_t helper_fnmadd_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
uint64_t frs3)
{
return float32_muladd(frs1, frs2, frs3, float_muladd_negate_c |
float_muladd_negate_product, &env->fp_status);
return do_fmadd_s(env, frs1, frs2, frs3,
float_muladd_negate_c | float_muladd_negate_product);
}

uint64_t helper_fnmadd_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
Expand All @@ -137,37 +141,37 @@ uint64_t helper_fnmadd_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,

uint64_t helper_fadd_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
{
return float32_add(frs1, frs2, &env->fp_status);
return nanbox_s(float32_add(frs1, frs2, &env->fp_status));
}

uint64_t helper_fsub_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
{
return float32_sub(frs1, frs2, &env->fp_status);
return nanbox_s(float32_sub(frs1, frs2, &env->fp_status));
}

uint64_t helper_fmul_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
{
return float32_mul(frs1, frs2, &env->fp_status);
return nanbox_s(float32_mul(frs1, frs2, &env->fp_status));
}

uint64_t helper_fdiv_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
{
return float32_div(frs1, frs2, &env->fp_status);
return nanbox_s(float32_div(frs1, frs2, &env->fp_status));
}

uint64_t helper_fmin_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
{
return float32_minnum(frs1, frs2, &env->fp_status);
return nanbox_s(float32_minnum(frs1, frs2, &env->fp_status));
}

uint64_t helper_fmax_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
{
return float32_maxnum(frs1, frs2, &env->fp_status);
return nanbox_s(float32_maxnum(frs1, frs2, &env->fp_status));
}

uint64_t helper_fsqrt_s(CPURISCVState *env, uint64_t frs1)
{
return float32_sqrt(frs1, &env->fp_status);
return nanbox_s(float32_sqrt(frs1, &env->fp_status));
}

target_ulong helper_fle_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
Expand Down Expand Up @@ -209,23 +213,23 @@ uint64_t helper_fcvt_lu_s(CPURISCVState *env, uint64_t frs1)

uint64_t helper_fcvt_s_w(CPURISCVState *env, target_ulong rs1)
{
return int32_to_float32((int32_t)rs1, &env->fp_status);
return nanbox_s(int32_to_float32((int32_t)rs1, &env->fp_status));
}

uint64_t helper_fcvt_s_wu(CPURISCVState *env, target_ulong rs1)
{
return uint32_to_float32((uint32_t)rs1, &env->fp_status);
return nanbox_s(uint32_to_float32((uint32_t)rs1, &env->fp_status));
}

#if defined(TARGET_RISCV64)
uint64_t helper_fcvt_s_l(CPURISCVState *env, uint64_t rs1)
{
return int64_to_float32(rs1, &env->fp_status);
return nanbox_s(int64_to_float32(rs1, &env->fp_status));
}

uint64_t helper_fcvt_s_lu(CPURISCVState *env, uint64_t rs1)
{
return uint64_to_float32(rs1, &env->fp_status);
return nanbox_s(uint64_to_float32(rs1, &env->fp_status));
}
#endif

Expand Down Expand Up @@ -266,7 +270,7 @@ uint64_t helper_fmax_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)

uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1)
{
return float64_to_float32(rs1, &env->fp_status);
return nanbox_s(float64_to_float32(rs1, &env->fp_status));
}

uint64_t helper_fcvt_d_s(CPURISCVState *env, uint64_t rs1)
Expand Down
5 changes: 5 additions & 0 deletions target/riscv/internals.h
View file
Expand Up @@ -38,4 +38,9 @@ target_ulong fclass_d(uint64_t frs1);
#define SEW32 2
#define SEW64 3

static inline uint64_t nanbox_s(float32 f)
{
return f | MAKE_64BIT_MASK(32, 32);
}

#endif

0 comments on commit 9921e3d

Please sign in to comment.