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target/mips: Raise exception when DINSV opcode used with DSP disabled
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Per the "MIPS® DSP Module for MIPS64 Architecture" manual, rev. 3.02,
Table 5.3 "SPECIAL3 Encoding of Function Field for DSP Module":

  If the Module/ASE is not implemented, executing such an instruction
  must cause a Reserved Instruction Exception.

The DINSV instruction lists the following exceptions:
- Reserved Instruction
- DSP Disabled

If the MIPS core doesn't support the DSP module, or the DSP is
disabled, do not handle the '$rt = $0' case as a no-op but raise
the proper exception instead.

Cc: Jia Liu <proljc@gmail.com>
Fixes: 1cb6686 ("target-mips: Add ASE DSP bit/manipulation instructions")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210529165443.1114402-1-f4bug@amsat.org>
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philmd committed Jun 24, 2021
1 parent 6eb2231 commit a071578
Showing 1 changed file with 2 additions and 1 deletion.
3 changes: 2 additions & 1 deletion target/mips/tcg/translate.c
Expand Up @@ -24379,10 +24379,11 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx)
{
TCGv t0, t1;

check_dsp(ctx);

if (rt == 0) {
break;
}
check_dsp(ctx);

t0 = tcg_temp_new();
t1 = tcg_temp_new();
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