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Rename target_phys_addr_t to hwaddr
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target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific).  Replace it with a finger-friendly,
standards conformant hwaddr.

Outstanding patchsets can be fixed up with the command

  git rebase -i --exec 'find -name "*.[ch]"
                        | xargs s/target_phys_addr_t/hwaddr/g' origin

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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avikivity authored and Anthony Liguori committed Oct 23, 2012
1 parent 50d2b4d commit a8170e5
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Showing 383 changed files with 2,240 additions and 2,240 deletions.
2 changes: 1 addition & 1 deletion HACKING
Expand Up @@ -32,7 +32,7 @@ mandatory for VMState fields.

Don't use Linux kernel internal types like u32, __u32 or __le32.

Use target_phys_addr_t for guest physical addresses except pcibus_t
Use hwaddr for guest physical addresses except pcibus_t
for PCI addresses. In addition, ram_addr_t is a QEMU internal address
space that maps guest RAM physical addresses into an intermediate
address space that can map to host virtual address spaces. Generally
Expand Down
2 changes: 1 addition & 1 deletion cpu-all.h
Expand Up @@ -474,7 +474,7 @@ void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
/* Return the physical page corresponding to a virtual one. Use it
only for debugging because no protection checks are done. Return -1
if no page found. */
target_phys_addr_t cpu_get_phys_page_debug(CPUArchState *env, target_ulong addr);
hwaddr cpu_get_phys_page_debug(CPUArchState *env, target_ulong addr);

/* memory API */

Expand Down
68 changes: 34 additions & 34 deletions cpu-common.h
Expand Up @@ -3,7 +3,7 @@

/* CPU interfaces that are target independent. */

#include "targphys.h"
#include "hwaddr.h"

#ifndef NEED_CPU_H
#include "poison.h"
Expand Down Expand Up @@ -33,8 +33,8 @@ typedef uintptr_t ram_addr_t;

/* memory API */

typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
typedef void CPUWriteMemoryFunc(void *opaque, hwaddr addr, uint32_t value);
typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr);

void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
/* This should only be used for ram local to a device. */
Expand All @@ -49,27 +49,27 @@ int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr);
void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev);

void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
int len, int is_write);
static inline void cpu_physical_memory_read(target_phys_addr_t addr,
static inline void cpu_physical_memory_read(hwaddr addr,
void *buf, int len)
{
cpu_physical_memory_rw(addr, buf, len, 0);
}
static inline void cpu_physical_memory_write(target_phys_addr_t addr,
static inline void cpu_physical_memory_write(hwaddr addr,
const void *buf, int len)
{
cpu_physical_memory_rw(addr, (void *)buf, len, 1);
}
void *cpu_physical_memory_map(target_phys_addr_t addr,
target_phys_addr_t *plen,
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
int is_write);
void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len,
int is_write, target_phys_addr_t access_len);
void cpu_physical_memory_unmap(void *buffer, hwaddr len,
int is_write, hwaddr access_len);
void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
void cpu_unregister_map_client(void *cookie);

bool cpu_physical_memory_is_io(target_phys_addr_t phys_addr);
bool cpu_physical_memory_is_io(hwaddr phys_addr);

/* Coalesced MMIO regions are areas where write operations can be reordered.
* This usually implies that write operations are side-effect free. This allows
Expand All @@ -78,33 +78,33 @@ bool cpu_physical_memory_is_io(target_phys_addr_t phys_addr);
*/
void qemu_flush_coalesced_mmio_buffer(void);

uint32_t ldub_phys(target_phys_addr_t addr);
uint32_t lduw_le_phys(target_phys_addr_t addr);
uint32_t lduw_be_phys(target_phys_addr_t addr);
uint32_t ldl_le_phys(target_phys_addr_t addr);
uint32_t ldl_be_phys(target_phys_addr_t addr);
uint64_t ldq_le_phys(target_phys_addr_t addr);
uint64_t ldq_be_phys(target_phys_addr_t addr);
void stb_phys(target_phys_addr_t addr, uint32_t val);
void stw_le_phys(target_phys_addr_t addr, uint32_t val);
void stw_be_phys(target_phys_addr_t addr, uint32_t val);
void stl_le_phys(target_phys_addr_t addr, uint32_t val);
void stl_be_phys(target_phys_addr_t addr, uint32_t val);
void stq_le_phys(target_phys_addr_t addr, uint64_t val);
void stq_be_phys(target_phys_addr_t addr, uint64_t val);
uint32_t ldub_phys(hwaddr addr);
uint32_t lduw_le_phys(hwaddr addr);
uint32_t lduw_be_phys(hwaddr addr);
uint32_t ldl_le_phys(hwaddr addr);
uint32_t ldl_be_phys(hwaddr addr);
uint64_t ldq_le_phys(hwaddr addr);
uint64_t ldq_be_phys(hwaddr addr);
void stb_phys(hwaddr addr, uint32_t val);
void stw_le_phys(hwaddr addr, uint32_t val);
void stw_be_phys(hwaddr addr, uint32_t val);
void stl_le_phys(hwaddr addr, uint32_t val);
void stl_be_phys(hwaddr addr, uint32_t val);
void stq_le_phys(hwaddr addr, uint64_t val);
void stq_be_phys(hwaddr addr, uint64_t val);

#ifdef NEED_CPU_H
uint32_t lduw_phys(target_phys_addr_t addr);
uint32_t ldl_phys(target_phys_addr_t addr);
uint64_t ldq_phys(target_phys_addr_t addr);
void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
void stw_phys(target_phys_addr_t addr, uint32_t val);
void stl_phys(target_phys_addr_t addr, uint32_t val);
void stq_phys(target_phys_addr_t addr, uint64_t val);
uint32_t lduw_phys(hwaddr addr);
uint32_t ldl_phys(hwaddr addr);
uint64_t ldq_phys(hwaddr addr);
void stl_phys_notdirty(hwaddr addr, uint32_t val);
void stq_phys_notdirty(hwaddr addr, uint64_t val);
void stw_phys(hwaddr addr, uint32_t val);
void stl_phys(hwaddr addr, uint32_t val);
void stq_phys(hwaddr addr, uint64_t val);
#endif

void cpu_physical_memory_write_rom(target_phys_addr_t addr,
void cpu_physical_memory_write_rom(hwaddr addr,
const uint8_t *buf, int len);

extern struct MemoryRegion io_mem_ram;
Expand Down
4 changes: 2 additions & 2 deletions cpu-defs.h
Expand Up @@ -29,7 +29,7 @@
#include <signal.h>
#include "osdep.h"
#include "qemu-queue.h"
#include "targphys.h"
#include "hwaddr.h"

#ifndef TARGET_LONG_BITS
#error TARGET_LONG_BITS must be defined before including this header
Expand Down Expand Up @@ -111,7 +111,7 @@ extern int CPUTLBEntry_wrong_size[sizeof(CPUTLBEntry) == (1 << CPU_TLB_ENTRY_BIT
#define CPU_COMMON_TLB \
/* The meaning of the MMU modes is defined in the target code. */ \
CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \
target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
hwaddr iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
target_ulong tlb_flush_addr; \
target_ulong tlb_flush_mask;

Expand Down
4 changes: 2 additions & 2 deletions cputlb.c
Expand Up @@ -237,7 +237,7 @@ static void tlb_add_large_page(CPUArchState *env, target_ulong vaddr,
is permitted. Only a single TARGET_PAGE_SIZE region is mapped, the
supplied size is only used by tlb_flush_page. */
void tlb_set_page(CPUArchState *env, target_ulong vaddr,
target_phys_addr_t paddr, int prot,
hwaddr paddr, int prot,
int mmu_idx, target_ulong size)
{
MemoryRegionSection *section;
Expand All @@ -246,7 +246,7 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr,
target_ulong code_address;
uintptr_t addend;
CPUTLBEntry *te;
target_phys_addr_t iotlb;
hwaddr iotlb;

assert(size >= TARGET_PAGE_SIZE);
if (size != TARGET_PAGE_SIZE) {
Expand Down
6 changes: 3 additions & 3 deletions cputlb.h
Expand Up @@ -27,17 +27,17 @@ void tlb_unprotect_code_phys(CPUArchState *env, ram_addr_t ram_addr,
void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start,
uintptr_t length);
MemoryRegionSection *phys_page_find(struct AddressSpaceDispatch *d,
target_phys_addr_t index);
hwaddr index);
void cpu_tlb_reset_dirty_all(ram_addr_t start1, ram_addr_t length);
void tlb_set_dirty(CPUArchState *env, target_ulong vaddr);
extern int tlb_flush_count;

/* exec.c */
void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr);
target_phys_addr_t memory_region_section_get_iotlb(CPUArchState *env,
hwaddr memory_region_section_get_iotlb(CPUArchState *env,
MemoryRegionSection *section,
target_ulong vaddr,
target_phys_addr_t paddr,
hwaddr paddr,
int prot,
target_ulong *address);
bool memory_region_is_unassigned(MemoryRegion *mr);
Expand Down
2 changes: 1 addition & 1 deletion disas.h
Expand Up @@ -22,7 +22,7 @@ struct elf64_sym;
#if defined(CONFIG_USER_ONLY)
typedef const char *(*lookup_symbol_t)(struct syminfo *s, target_ulong orig_addr);
#else
typedef const char *(*lookup_symbol_t)(struct syminfo *s, target_phys_addr_t orig_addr);
typedef const char *(*lookup_symbol_t)(struct syminfo *s, hwaddr orig_addr);
#endif

struct syminfo {
Expand Down
8 changes: 4 additions & 4 deletions dma-helpers.c
Expand Up @@ -281,7 +281,7 @@ void dma_acct_start(BlockDriverState *bs, BlockAcctCookie *cookie,
bool iommu_dma_memory_valid(DMAContext *dma, dma_addr_t addr, dma_addr_t len,
DMADirection dir)
{
target_phys_addr_t paddr, plen;
hwaddr paddr, plen;

#ifdef DEBUG_IOMMU
fprintf(stderr, "dma_memory_check context=%p addr=0x" DMA_ADDR_FMT
Expand All @@ -308,7 +308,7 @@ bool iommu_dma_memory_valid(DMAContext *dma, dma_addr_t addr, dma_addr_t len,
int iommu_dma_memory_rw(DMAContext *dma, dma_addr_t addr,
void *buf, dma_addr_t len, DMADirection dir)
{
target_phys_addr_t paddr, plen;
hwaddr paddr, plen;
int err;

#ifdef DEBUG_IOMMU
Expand Down Expand Up @@ -346,7 +346,7 @@ int iommu_dma_memory_rw(DMAContext *dma, dma_addr_t addr,
int iommu_dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c,
dma_addr_t len)
{
target_phys_addr_t paddr, plen;
hwaddr paddr, plen;
int err;

#ifdef DEBUG_IOMMU
Expand Down Expand Up @@ -392,7 +392,7 @@ void *iommu_dma_memory_map(DMAContext *dma, dma_addr_t addr, dma_addr_t *len,
DMADirection dir)
{
int err;
target_phys_addr_t paddr, plen;
hwaddr paddr, plen;
void *buf;

if (dma->map) {
Expand Down
8 changes: 4 additions & 4 deletions dma.h
Expand Up @@ -48,8 +48,8 @@ typedef uint64_t dma_addr_t;

typedef int DMATranslateFunc(DMAContext *dma,
dma_addr_t addr,
target_phys_addr_t *paddr,
target_phys_addr_t *len,
hwaddr *paddr,
hwaddr *len,
DMADirection dir);
typedef void* DMAMapFunc(DMAContext *dma,
dma_addr_t addr,
Expand Down Expand Up @@ -177,7 +177,7 @@ static inline void *dma_memory_map(DMAContext *dma,
DMADirection dir)
{
if (!dma_has_iommu(dma)) {
target_phys_addr_t xlen = *len;
hwaddr xlen = *len;
void *p;

p = address_space_map(dma->as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE);
Expand All @@ -196,7 +196,7 @@ static inline void dma_memory_unmap(DMAContext *dma,
DMADirection dir, dma_addr_t access_len)
{
if (!dma_has_iommu(dma)) {
address_space_unmap(dma->as, buffer, (target_phys_addr_t)len,
address_space_unmap(dma->as, buffer, (hwaddr)len,
dir == DMA_DIRECTION_FROM_DEVICE, access_len);
} else {
iommu_dma_memory_unmap(dma, buffer, len, dir, access_len);
Expand Down
18 changes: 9 additions & 9 deletions dump.c
Expand Up @@ -15,7 +15,7 @@
#include "elf.h"
#include "cpu.h"
#include "cpu-all.h"
#include "targphys.h"
#include "hwaddr.h"
#include "monitor.h"
#include "kvm.h"
#include "dump.h"
Expand Down Expand Up @@ -66,7 +66,7 @@ typedef struct DumpState {
bool have_section;
bool resume;
size_t note_size;
target_phys_addr_t memory_offset;
hwaddr memory_offset;
int fd;

RAMBlock *block;
Expand Down Expand Up @@ -187,7 +187,7 @@ static int write_elf32_header(DumpState *s)
}

static int write_elf64_load(DumpState *s, MemoryMapping *memory_mapping,
int phdr_index, target_phys_addr_t offset)
int phdr_index, hwaddr offset)
{
Elf64_Phdr phdr;
int ret;
Expand Down Expand Up @@ -216,7 +216,7 @@ static int write_elf64_load(DumpState *s, MemoryMapping *memory_mapping,
}

static int write_elf32_load(DumpState *s, MemoryMapping *memory_mapping,
int phdr_index, target_phys_addr_t offset)
int phdr_index, hwaddr offset)
{
Elf32_Phdr phdr;
int ret;
Expand Down Expand Up @@ -248,7 +248,7 @@ static int write_elf64_note(DumpState *s)
{
Elf64_Phdr phdr;
int endian = s->dump_info.d_endian;
target_phys_addr_t begin = s->memory_offset - s->note_size;
hwaddr begin = s->memory_offset - s->note_size;
int ret;

memset(&phdr, 0, sizeof(Elf64_Phdr));
Expand Down Expand Up @@ -296,7 +296,7 @@ static int write_elf64_notes(DumpState *s)

static int write_elf32_note(DumpState *s)
{
target_phys_addr_t begin = s->memory_offset - s->note_size;
hwaddr begin = s->memory_offset - s->note_size;
Elf32_Phdr phdr;
int endian = s->dump_info.d_endian;
int ret;
Expand Down Expand Up @@ -414,11 +414,11 @@ static int write_memory(DumpState *s, RAMBlock *block, ram_addr_t start,
}

/* get the memory's offset in the vmcore */
static target_phys_addr_t get_offset(target_phys_addr_t phys_addr,
static hwaddr get_offset(hwaddr phys_addr,
DumpState *s)
{
RAMBlock *block;
target_phys_addr_t offset = s->memory_offset;
hwaddr offset = s->memory_offset;
int64_t size_in_block, start;

if (s->has_filter) {
Expand Down Expand Up @@ -463,7 +463,7 @@ static target_phys_addr_t get_offset(target_phys_addr_t phys_addr,

static int write_elf_loads(DumpState *s)
{
target_phys_addr_t offset;
hwaddr offset;
MemoryMapping *memory_mapping;
uint32_t phdr_index = 1;
int ret;
Expand Down
10 changes: 5 additions & 5 deletions exec-all.h
Expand Up @@ -103,9 +103,9 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end,
void tlb_flush_page(CPUArchState *env, target_ulong addr);
void tlb_flush(CPUArchState *env, int flush_global);
void tlb_set_page(CPUArchState *env, target_ulong vaddr,
target_phys_addr_t paddr, int prot,
hwaddr paddr, int prot,
int mmu_idx, target_ulong size);
void tb_invalidate_phys_addr(target_phys_addr_t addr);
void tb_invalidate_phys_addr(hwaddr addr);
#else
static inline void tlb_flush_page(CPUArchState *env, target_ulong addr)
{
Expand Down Expand Up @@ -312,10 +312,10 @@ extern uintptr_t tci_tb_ptr;

#if !defined(CONFIG_USER_ONLY)

struct MemoryRegion *iotlb_to_region(target_phys_addr_t index);
uint64_t io_mem_read(struct MemoryRegion *mr, target_phys_addr_t addr,
struct MemoryRegion *iotlb_to_region(hwaddr index);
uint64_t io_mem_read(struct MemoryRegion *mr, hwaddr addr,
unsigned size);
void io_mem_write(struct MemoryRegion *mr, target_phys_addr_t addr,
void io_mem_write(struct MemoryRegion *mr, hwaddr addr,
uint64_t value, unsigned size);

void tlb_fill(CPUArchState *env1, target_ulong addr, int is_write, int mmu_idx,
Expand Down

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