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Hexagon (gdbstub): fix p3:0 read and write via stub
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Signed-off-by: Brian Cain <bcain@quicinc.com>
Co-authored-by: Sid Manning <sidneym@quicinc.com>
Signed-off-by: Sid Manning <sidneym@quicinc.com>
Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <32e7de567cdae184a6781644454bbb19916c955b.1683214375.git.quic_mathbern@quicinc.com>
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3 people authored and taylorsimpson committed May 18, 2023
1 parent ab930e8 commit b0bd9d8
Showing 1 changed file with 16 additions and 0 deletions.
16 changes: 16 additions & 0 deletions target/hexagon/gdbstub.c
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,14 @@ int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;

if (n == HEX_REG_P3_0_ALIASED) {
uint32_t p3_0 = 0;
for (int i = 0; i < NUM_PREGS; i++) {
p3_0 = deposit32(p3_0, i * 8, 8, env->pred[i]);
}
return gdb_get_regl(mem_buf, p3_0);
}

if (n < TOTAL_PER_THREAD_REGS) {
return gdb_get_regl(mem_buf, env->gpr[n]);
}
Expand All @@ -37,6 +45,14 @@ int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;

if (n == HEX_REG_P3_0_ALIASED) {
uint32_t p3_0 = ldtul_p(mem_buf);
for (int i = 0; i < NUM_PREGS; i++) {
env->pred[i] = extract32(p3_0, i * 8, 8);
}
return sizeof(target_ulong);
}

if (n < TOTAL_PER_THREAD_REGS) {
env->gpr[n] = ldtul_p(mem_buf);
return sizeof(target_ulong);
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