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Merge tag 'pull-tcg-20240205' of https://gitlab.com/rth7680/qemu into…
… staging tcg: Introduce TCG_COND_TST{EQ,NE} target/alpha: Use TCG_COND_TST{EQ,NE} target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM} target/s390x: Improve general case of disas_jcc # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmXAA/QdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9Lmgf9GQrBFu8GAEzWCyUs # Ob6L5voBEHZtJyqJRBi+bOFeEA2948ae8kKZPJnkBpA6RReTqhgDH2rWqmgiORHa # E8kpmcw6V7vn++vzkToMF/JkaXsfugKwEl/nQnPw+MUKy4tJTH79pD48b6Ncyjy9 # FlEOQgMhIvw8kQBege9CC3Xy5Vd+AIVYj1yeqANlUutBZg3N3z4vNHBiK+sjOD93 # 6RfmQkmyFnNs+Qp57nsRLtYFI80ays/tUbkfDSsph+8uJYqNSAgDsMEaK46rXhK8 # EWUxtVbLj3aJvPJcTQUeb9DoZH3GEOTlSaagpIIoSZv1MwFsJaajl4Qm0PHu5SxO # sTCHnQ== # =SPxw # -----END PGP SIGNATURE----- # gpg: Signature made Sun 04 Feb 2024 21:39:00 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20240205' of https://gitlab.com/rth7680/qemu: (39 commits) tcg/tci: Support TCG_COND_TST{EQ,NE} tcg/s390x: Support TCG_COND_TST{EQ,NE} tcg/s390x: Add TCG_CT_CONST_CMP tcg/s390x: Split constraint A into J+U tcg/ppc: Support TCG_COND_TST{EQ,NE} tcg/ppc: Add TCG_CT_CONST_CMP tcg/ppc: Tidy up tcg_target_const_match tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc tcg/sparc64: Support TCG_COND_TST{EQ,NE} tcg/sparc64: Pass TCGCond to tcg_out_cmp tcg/sparc64: Hoist read of tcg_cond_to_rcond tcg/i386: Use TEST r,r to test 8/16/32 bits tcg/i386: Improve TSTNE/TESTEQ vs powers of two tcg/i386: Support TCG_COND_TST{EQ,NE} tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp tcg/i386: Pass x86 condition codes to tcg_out_cmov tcg/arm: Support TCG_COND_TST{EQ,NE} tcg/arm: Split out tcg_out_cmp() tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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