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It is needed because it defines the BIOSConfig area. Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <20231004083806.757242-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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@@ -24,6 +24,7 @@ config Q800 | |
select DP8393X | ||
select OR_IRQ | ||
select DJMEMC | ||
select IOSB | ||
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config M68K_VIRT | ||
bool | ||
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@@ -189,4 +189,7 @@ config AXP2XX_PMU | |
config DJMEMC | ||
bool | ||
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config IOSB | ||
bool | ||
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source macio/Kconfig |
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/* | ||
* QEMU IOSB emulation | ||
* | ||
* Copyright (c) 2019 Laurent Vivier | ||
* Copyright (c) 2022 Mark Cave-Ayland | ||
* | ||
* SPDX-License-Identifier: GPL-2.0-or-later | ||
*/ | ||
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#include "qemu/osdep.h" | ||
#include "qemu/log.h" | ||
#include "migration/vmstate.h" | ||
#include "hw/sysbus.h" | ||
#include "hw/misc/iosb.h" | ||
#include "trace.h" | ||
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#define IOSB_SIZE 0x2000 | ||
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#define IOSB_CONFIG 0x0 | ||
#define IOSB_CONFIG2 0x100 | ||
#define IOSB_SONIC_SCSI 0x200 | ||
#define IOSB_REVISION 0x300 | ||
#define IOSB_SCSI_RESID 0x400 | ||
#define IOSB_BRIGHTNESS 0x500 | ||
#define IOSB_TIMEOUT 0x600 | ||
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static uint64_t iosb_read(void *opaque, hwaddr addr, | ||
unsigned size) | ||
{ | ||
IOSBState *s = IOSB(opaque); | ||
uint64_t val = 0; | ||
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switch (addr) { | ||
case IOSB_CONFIG: | ||
case IOSB_CONFIG2: | ||
case IOSB_SONIC_SCSI: | ||
case IOSB_REVISION: | ||
case IOSB_SCSI_RESID: | ||
case IOSB_BRIGHTNESS: | ||
case IOSB_TIMEOUT: | ||
val = s->regs[addr >> 8]; | ||
break; | ||
default: | ||
qemu_log_mask(LOG_UNIMP, "IOSB: unimplemented read addr=0x%"PRIx64 | ||
" val=0x%"PRIx64 " size=%d\n", | ||
addr, val, size); | ||
} | ||
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trace_iosb_read(addr, val, size); | ||
return val; | ||
} | ||
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static void iosb_write(void *opaque, hwaddr addr, uint64_t val, | ||
unsigned size) | ||
{ | ||
IOSBState *s = IOSB(opaque); | ||
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switch (addr) { | ||
case IOSB_CONFIG: | ||
case IOSB_CONFIG2: | ||
case IOSB_SONIC_SCSI: | ||
case IOSB_REVISION: | ||
case IOSB_SCSI_RESID: | ||
case IOSB_BRIGHTNESS: | ||
case IOSB_TIMEOUT: | ||
s->regs[addr >> 8] = val; | ||
break; | ||
default: | ||
qemu_log_mask(LOG_UNIMP, "IOSB: unimplemented write addr=0x%"PRIx64 | ||
" val=0x%"PRIx64 " size=%d\n", | ||
addr, val, size); | ||
} | ||
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trace_iosb_write(addr, val, size); | ||
} | ||
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static const MemoryRegionOps iosb_mmio_ops = { | ||
.read = iosb_read, | ||
.write = iosb_write, | ||
.endianness = DEVICE_BIG_ENDIAN, | ||
}; | ||
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static void iosb_reset_hold(Object *obj) | ||
{ | ||
IOSBState *s = IOSB(obj); | ||
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memset(s->regs, 0, sizeof(s->regs)); | ||
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/* BCLK 33 MHz */ | ||
s->regs[IOSB_CONFIG >> 8] = 1; | ||
} | ||
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static void iosb_init(Object *obj) | ||
{ | ||
IOSBState *s = IOSB(obj); | ||
SysBusDevice *sbd = SYS_BUS_DEVICE(obj); | ||
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memory_region_init_io(&s->mem_regs, obj, &iosb_mmio_ops, s, "IOSB", | ||
IOSB_SIZE); | ||
sysbus_init_mmio(sbd, &s->mem_regs); | ||
} | ||
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static const VMStateDescription vmstate_iosb = { | ||
.name = "IOSB", | ||
.version_id = 1, | ||
.minimum_version_id = 1, | ||
.fields = (VMStateField[]) { | ||
VMSTATE_UINT32_ARRAY(regs, IOSBState, IOSB_REGS), | ||
VMSTATE_END_OF_LIST() | ||
} | ||
}; | ||
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static void iosb_class_init(ObjectClass *oc, void *data) | ||
{ | ||
DeviceClass *dc = DEVICE_CLASS(oc); | ||
ResettableClass *rc = RESETTABLE_CLASS(oc); | ||
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dc->vmsd = &vmstate_iosb; | ||
rc->phases.hold = iosb_reset_hold; | ||
} | ||
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static const TypeInfo iosb_info_types[] = { | ||
{ | ||
.name = TYPE_IOSB, | ||
.parent = TYPE_SYS_BUS_DEVICE, | ||
.instance_size = sizeof(IOSBState), | ||
.instance_init = iosb_init, | ||
.class_init = iosb_class_init, | ||
}, | ||
}; | ||
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DEFINE_TYPES(iosb_info_types) |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,25 @@ | ||
/* | ||
* QEMU IOSB emulation | ||
* | ||
* Copyright (c) 2019 Laurent Vivier | ||
* Copyright (c) 2022 Mark Cave-Ayland | ||
* | ||
* SPDX-License-Identifier: GPL-2.0-or-later | ||
*/ | ||
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#ifndef HW_MEM_IOSB_H | ||
#define HW_MEM_IOSB_H | ||
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#define IOSB_REGS 7 | ||
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struct IOSBState { | ||
SysBusDevice parent_obj; | ||
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MemoryRegion mem_regs; | ||
uint32_t regs[IOSB_REGS]; | ||
}; | ||
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#define TYPE_IOSB "IOSB" | ||
OBJECT_DECLARE_SIMPLE_TYPE(IOSBState, IOSB); | ||
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#endif |