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hw/arm/boot: Drop nb_cpus field from arm_boot_info
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We use the arm_boot_info::nb_cpus field in only one place, and that
place can easily get the number of CPUs locally rather than relying
on the board code to have set the field correctly.  (At least one
board, xlnx-versal-virt, does not set the field despite having more
than one CPU.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Tested-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Message-id: 20220127154639.2090164-16-peter.maydell@linaro.org
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pm215 committed Feb 8, 2022
1 parent 45dd668 commit d6dc926
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Showing 18 changed files with 5 additions and 26 deletions.
1 change: 0 additions & 1 deletion hw/arm/aspeed.c
Expand Up @@ -431,7 +431,6 @@ static void aspeed_machine_init(MachineState *machine)

aspeed_board_binfo.ram_size = machine->ram_size;
aspeed_board_binfo.loader_start = sc->memmap[ASPEED_DEV_SDRAM];
aspeed_board_binfo.nb_cpus = sc->num_cpus;

if (amc->i2c_init) {
amc->i2c_init(bmc);
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7 changes: 3 additions & 4 deletions hw/arm/boot.c
Expand Up @@ -1030,9 +1030,6 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu,
elf_machine = EM_ARM;
}

if (info->nb_cpus == 0)
info->nb_cpus = 1;

/* Assume that raw images are linux kernels, and ELF images are not. */
kernel_size = arm_load_elf(info, &elf_entry, &image_low_addr,
&image_high_addr, elf_machine, as);
Expand Down Expand Up @@ -1291,6 +1288,7 @@ void arm_load_kernel(ARMCPU *cpu, MachineState *ms, struct arm_boot_info *info)
AddressSpace *as = arm_boot_address_space(cpu, info);
int boot_el;
CPUARMState *env = &cpu->env;
int nb_cpus = 0;

/*
* CPU objects (unlike devices) are not automatically reset on system
Expand All @@ -1300,6 +1298,7 @@ void arm_load_kernel(ARMCPU *cpu, MachineState *ms, struct arm_boot_info *info)
*/
for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) {
qemu_register_reset(do_cpu_reset, ARM_CPU(cs));
nb_cpus++;
}

/*
Expand Down Expand Up @@ -1376,7 +1375,7 @@ void arm_load_kernel(ARMCPU *cpu, MachineState *ms, struct arm_boot_info *info)
}

if (info->psci_conduit == QEMU_PSCI_CONDUIT_DISABLED &&
info->is_linux && info->nb_cpus > 1) {
info->is_linux && nb_cpus > 1) {
/*
* We're booting Linux but not using PSCI, so for SMP we need
* to write a custom secondary CPU boot loader stub, and arrange
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1 change: 0 additions & 1 deletion hw/arm/exynos4_boards.c
Expand Up @@ -67,7 +67,6 @@ static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
static struct arm_boot_info exynos4_board_binfo = {
.loader_start = EXYNOS4210_BASE_BOOT_ADDR,
.smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR,
.nb_cpus = EXYNOS4210_NCPUS,
.write_secondary_boot = exynos4210_write_secondary,
};

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1 change: 0 additions & 1 deletion hw/arm/highbank.c
Expand Up @@ -324,7 +324,6 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
* clear that the value is meaningless.
*/
highbank_binfo.board_id = -1;
highbank_binfo.nb_cpus = smp_cpus;
highbank_binfo.loader_start = 0;
highbank_binfo.board_setup_addr = BOARD_SETUP_ADDR;
highbank_binfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC;
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3 changes: 1 addition & 2 deletions hw/arm/imx25_pdk.c
Expand Up @@ -114,8 +114,7 @@ static void imx25_pdk_init(MachineState *machine)

imx25_pdk_binfo.ram_size = machine->ram_size;
imx25_pdk_binfo.loader_start = FSL_IMX25_SDRAM0_ADDR;
imx25_pdk_binfo.board_id = 1771,
imx25_pdk_binfo.nb_cpus = 1;
imx25_pdk_binfo.board_id = 1771;

for (i = 0; i < FSL_IMX25_NUM_ESDHCS; i++) {
BusState *bus;
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1 change: 0 additions & 1 deletion hw/arm/kzm.c
Expand Up @@ -124,7 +124,6 @@ static void kzm_init(MachineState *machine)
}

kzm_binfo.ram_size = machine->ram_size;
kzm_binfo.nb_cpus = 1;

if (!qtest_enabled()) {
arm_load_kernel(&s->soc.cpu, machine, &kzm_binfo);
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1 change: 0 additions & 1 deletion hw/arm/mcimx6ul-evk.c
Expand Up @@ -34,7 +34,6 @@ static void mcimx6ul_evk_init(MachineState *machine)
.loader_start = FSL_IMX6UL_MMDC_ADDR,
.board_id = -1,
.ram_size = machine->ram_size,
.nb_cpus = machine->smp.cpus,
.psci_conduit = QEMU_PSCI_CONDUIT_SMC,
};

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1 change: 0 additions & 1 deletion hw/arm/mcimx7d-sabre.c
Expand Up @@ -36,7 +36,6 @@ static void mcimx7d_sabre_init(MachineState *machine)
.loader_start = FSL_IMX7_MMDC_ADDR,
.board_id = -1,
.ram_size = machine->ram_size,
.nb_cpus = machine->smp.cpus,
.psci_conduit = QEMU_PSCI_CONDUIT_SMC,
};

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3 changes: 0 additions & 3 deletions hw/arm/npcm7xx.c
Expand Up @@ -355,10 +355,7 @@ static struct arm_boot_info npcm7xx_binfo = {

void npcm7xx_load_kernel(MachineState *machine, NPCM7xxState *soc)
{
NPCM7xxClass *sc = NPCM7XX_GET_CLASS(soc);

npcm7xx_binfo.ram_size = machine->ram_size;
npcm7xx_binfo.nb_cpus = sc->num_cpus;

arm_load_kernel(&soc->cpu[0], machine, &npcm7xx_binfo);
}
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4 changes: 1 addition & 3 deletions hw/arm/orangepi.c
Expand Up @@ -25,9 +25,7 @@
#include "hw/qdev-properties.h"
#include "hw/arm/allwinner-h3.h"

static struct arm_boot_info orangepi_binfo = {
.nb_cpus = AW_H3_NUM_CPUS,
};
static struct arm_boot_info orangepi_binfo;

static void orangepi_init(MachineState *machine)
{
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1 change: 0 additions & 1 deletion hw/arm/raspi.c
Expand Up @@ -204,7 +204,6 @@ static void setup_boot(MachineState *machine, RaspiProcessorId processor_id,

s->binfo.board_id = MACH_TYPE_BCM2708;
s->binfo.ram_size = ram_size;
s->binfo.nb_cpus = machine->smp.cpus;

if (processor_id <= PROCESSOR_ID_BCM2836) {
/*
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1 change: 0 additions & 1 deletion hw/arm/realview.c
Expand Up @@ -363,7 +363,6 @@ static void realview_init(MachineState *machine,
memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);

realview_binfo.ram_size = ram_size;
realview_binfo.nb_cpus = smp_cpus;
realview_binfo.board_id = realview_board_id[board_type];
realview_binfo.loader_start = (board_type == BOARD_PB_A8 ? 0x70000000 : 0);
arm_load_kernel(ARM_CPU(first_cpu), machine, &realview_binfo);
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1 change: 0 additions & 1 deletion hw/arm/sabrelite.c
Expand Up @@ -93,7 +93,6 @@ static void sabrelite_init(MachineState *machine)
}

sabrelite_binfo.ram_size = machine->ram_size;
sabrelite_binfo.nb_cpus = machine->smp.cpus;
sabrelite_binfo.secure_boot = true;
sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary;
sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary;
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1 change: 0 additions & 1 deletion hw/arm/sbsa-ref.c
Expand Up @@ -776,7 +776,6 @@ static void sbsa_ref_init(MachineState *machine)
create_secure_ec(secure_sysmem);

sms->bootinfo.ram_size = machine->ram_size;
sms->bootinfo.nb_cpus = smp_cpus;
sms->bootinfo.board_id = -1;
sms->bootinfo.loader_start = sbsa_ref_memmap[SBSA_MEM].base;
sms->bootinfo.get_dtb = sbsa_ref_dtb;
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1 change: 0 additions & 1 deletion hw/arm/vexpress.c
Expand Up @@ -708,7 +708,6 @@ static void vexpress_common_init(MachineState *machine)
}

daughterboard->bootinfo.ram_size = machine->ram_size;
daughterboard->bootinfo.nb_cpus = machine->smp.cpus;
daughterboard->bootinfo.board_id = VEXPRESS_BOARD_ID;
daughterboard->bootinfo.loader_start = daughterboard->loader_start;
daughterboard->bootinfo.smp_loader_start = map[VE_SRAM];
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1 change: 0 additions & 1 deletion hw/arm/virt.c
Expand Up @@ -2229,7 +2229,6 @@ static void machvirt_init(MachineState *machine)
}

vms->bootinfo.ram_size = machine->ram_size;
vms->bootinfo.nb_cpus = smp_cpus;
vms->bootinfo.board_id = -1;
vms->bootinfo.loader_start = vms->memmap[VIRT_MEM].base;
vms->bootinfo.get_dtb = machvirt_dtb;
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1 change: 0 additions & 1 deletion hw/arm/xilinx_zynq.c
Expand Up @@ -343,7 +343,6 @@ static void zynq_init(MachineState *machine)
sysbus_mmio_map(busdev, 0, 0xF8007000);

zynq_binfo.ram_size = machine->ram_size;
zynq_binfo.nb_cpus = 1;
zynq_binfo.board_id = 0xd32;
zynq_binfo.loader_start = 0;
zynq_binfo.board_setup_addr = BOARD_SETUP_ADDR;
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1 change: 0 additions & 1 deletion include/hw/arm/boot.h
Expand Up @@ -56,7 +56,6 @@ struct arm_boot_info {
hwaddr smp_loader_start;
hwaddr smp_bootreg_addr;
hwaddr gic_cpu_if_addr;
int nb_cpus;
int board_id;
/* ARM machines that support the ARM Security Extensions use this field to
* control whether Linux is booted as secure(true) or non-secure(false).
Expand Down

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