Skip to content

Commit

Permalink
target/mips: msa: Split helpers for HADD_<S|U>.<H|W|D>
Browse files Browse the repository at this point in the history 
Achieves clearer code and slightly better performance.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-9-git-send-email-aleksandar.markovic@rt-rk.com>
  • Loading branch information
@AMarkovic
AMarkovic committed Oct 25, 2019
1 parent c65ca13 commit dc0af93
Show file tree
Hide file tree
Showing 3 changed files with 141 additions and 32 deletions.
10 changes: 8 additions & 2 deletions target/mips/helper.h
View file
Expand Up @@ -847,6 +847,14 @@ DEF_HELPER_4(msa_addv_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_addv_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_addv_d, void, env, i32, i32, i32)

DEF_HELPER_4(msa_hadd_s_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hadd_s_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hadd_s_d, void, env, i32, i32, i32)

DEF_HELPER_4(msa_hadd_u_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hadd_u_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hadd_u_d, void, env, i32, i32, i32)

DEF_HELPER_4(msa_ave_s_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_s_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_s_w, void, env, i32, i32, i32)
Expand Down Expand Up @@ -1024,8 +1032,6 @@ DEF_HELPER_5(msa_pckod_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_vshf_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_srar_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_srlr_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_hadd_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_hadd_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_hsub_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_hsub_u_df, void, env, i32, i32, i32, i32)

Expand Down
131 changes: 107 additions & 24 deletions target/mips/msa_helper.c
View file
Expand Up @@ -1184,6 +1184,113 @@ void helper_msa_addv_d(CPUMIPSState *env,
}


#define SIGNED_EVEN(a, df) \
((((int64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))

#define UNSIGNED_EVEN(a, df) \
((((uint64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))

#define SIGNED_ODD(a, df) \
((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))

#define UNSIGNED_ODD(a, df) \
((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))


static inline int64_t msa_hadd_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return SIGNED_ODD(arg1, df) + SIGNED_EVEN(arg2, df);
}

void helper_msa_hadd_s_h(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);

pwd->h[0] = msa_hadd_s_df(DF_HALF, pws->h[0], pwt->h[0]);
pwd->h[1] = msa_hadd_s_df(DF_HALF, pws->h[1], pwt->h[1]);
pwd->h[2] = msa_hadd_s_df(DF_HALF, pws->h[2], pwt->h[2]);
pwd->h[3] = msa_hadd_s_df(DF_HALF, pws->h[3], pwt->h[3]);
pwd->h[4] = msa_hadd_s_df(DF_HALF, pws->h[4], pwt->h[4]);
pwd->h[5] = msa_hadd_s_df(DF_HALF, pws->h[5], pwt->h[5]);
pwd->h[6] = msa_hadd_s_df(DF_HALF, pws->h[6], pwt->h[6]);
pwd->h[7] = msa_hadd_s_df(DF_HALF, pws->h[7], pwt->h[7]);
}

void helper_msa_hadd_s_w(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);

pwd->w[0] = msa_hadd_s_df(DF_WORD, pws->w[0], pwt->w[0]);
pwd->w[1] = msa_hadd_s_df(DF_WORD, pws->w[1], pwt->w[1]);
pwd->w[2] = msa_hadd_s_df(DF_WORD, pws->w[2], pwt->w[2]);
pwd->w[3] = msa_hadd_s_df(DF_WORD, pws->w[3], pwt->w[3]);
}

void helper_msa_hadd_s_d(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);

pwd->d[0] = msa_hadd_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
pwd->d[1] = msa_hadd_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
}


static inline int64_t msa_hadd_u_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return UNSIGNED_ODD(arg1, df) + UNSIGNED_EVEN(arg2, df);
}

void helper_msa_hadd_u_h(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);

pwd->h[0] = msa_hadd_u_df(DF_HALF, pws->h[0], pwt->h[0]);
pwd->h[1] = msa_hadd_u_df(DF_HALF, pws->h[1], pwt->h[1]);
pwd->h[2] = msa_hadd_u_df(DF_HALF, pws->h[2], pwt->h[2]);
pwd->h[3] = msa_hadd_u_df(DF_HALF, pws->h[3], pwt->h[3]);
pwd->h[4] = msa_hadd_u_df(DF_HALF, pws->h[4], pwt->h[4]);
pwd->h[5] = msa_hadd_u_df(DF_HALF, pws->h[5], pwt->h[5]);
pwd->h[6] = msa_hadd_u_df(DF_HALF, pws->h[6], pwt->h[6]);
pwd->h[7] = msa_hadd_u_df(DF_HALF, pws->h[7], pwt->h[7]);
}

void helper_msa_hadd_u_w(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);

pwd->w[0] = msa_hadd_u_df(DF_WORD, pws->w[0], pwt->w[0]);
pwd->w[1] = msa_hadd_u_df(DF_WORD, pws->w[1], pwt->w[1]);
pwd->w[2] = msa_hadd_u_df(DF_WORD, pws->w[2], pwt->w[2]);
pwd->w[3] = msa_hadd_u_df(DF_WORD, pws->w[3], pwt->w[3]);
}

void helper_msa_hadd_u_d(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);

pwd->d[0] = msa_hadd_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
pwd->d[1] = msa_hadd_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
}


/*
* Int Average
* -----------
Expand Down Expand Up @@ -3727,18 +3834,6 @@ static inline int64_t msa_mulv_df(uint32_t df, int64_t arg1, int64_t arg2)
return arg1 * arg2;
}

#define SIGNED_EVEN(a, df) \
((((int64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))

#define UNSIGNED_EVEN(a, df) \
((((uint64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))

#define SIGNED_ODD(a, df) \
((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))

#define UNSIGNED_ODD(a, df) \
((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))

#define SIGNED_EXTRACT(e, o, a, df) \
do { \
e = SIGNED_EVEN(a, df); \
Expand Down Expand Up @@ -3815,16 +3910,6 @@ static inline void msa_sld_df(uint32_t df, wr_t *pwd,
}
}

static inline int64_t msa_hadd_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return SIGNED_ODD(arg1, df) + SIGNED_EVEN(arg2, df);
}

static inline int64_t msa_hadd_u_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return UNSIGNED_ODD(arg1, df) + UNSIGNED_EVEN(arg2, df);
}

static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df);
Expand Down Expand Up @@ -3925,8 +4010,6 @@ MSA_BINOP_DF(dotp_s)
MSA_BINOP_DF(dotp_u)
MSA_BINOP_DF(srar)
MSA_BINOP_DF(srlr)
MSA_BINOP_DF(hadd_s)
MSA_BINOP_DF(hadd_u)
MSA_BINOP_DF(hsub_s)
MSA_BINOP_DF(hsub_u)

Expand Down
32 changes: 26 additions & 6 deletions target/mips/translate.c
View file
Expand Up @@ -28990,6 +28990,32 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
break;
}
switch (MASK_MSA_3R(ctx->opcode)) {
case OPC_HADD_S_df:
switch (df) {
case DF_HALF:
gen_helper_msa_hadd_s_h(cpu_env, twd, tws, twt);
break;
case DF_WORD:
gen_helper_msa_hadd_s_w(cpu_env, twd, tws, twt);
break;
case DF_DOUBLE:
gen_helper_msa_hadd_s_d(cpu_env, twd, tws, twt);
break;
}
break;
case OPC_HADD_U_df:
switch (df) {
case DF_HALF:
gen_helper_msa_hadd_u_h(cpu_env, twd, tws, twt);
break;
case DF_WORD:
gen_helper_msa_hadd_u_w(cpu_env, twd, tws, twt);
break;
case DF_DOUBLE:
gen_helper_msa_hadd_u_d(cpu_env, twd, tws, twt);
break;
}
break;
case OPC_DOTP_S_df:
gen_helper_msa_dotp_s_df(cpu_env, tdf, twd, tws, twt);
break;
Expand All @@ -29005,15 +29031,9 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
case OPC_DPSUB_S_df:
gen_helper_msa_dpsub_s_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_HADD_S_df:
gen_helper_msa_hadd_s_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_DPSUB_U_df:
gen_helper_msa_dpsub_u_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_HADD_U_df:
gen_helper_msa_hadd_u_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_HSUB_S_df:
gen_helper_msa_hsub_s_df(cpu_env, tdf, twd, tws, twt);
break;
Expand Down

0 comments on commit dc0af93

Please sign in to comment.