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Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst…
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…/qemu into staging

pc,virtio: fixes

Several fixes. From now on, regression fixes only.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

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* tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu:
  hw/virtio/virtio-iommu: Enforce power-of-two notify for both MAP and UNMAP
  i386/pc: restrict AMD only enforcing of 1Tb hole to new machine type
  i386/pc: relocate 4g start to 1T where applicable
  i386/pc: bounds check phys-bits against max used GPA
  i386/pc: factor out device_memory base/size to helper
  i386/pc: handle unitialized mr in pc_get_cxl_range_end()
  i386/pc: factor out cxl range start to helper
  i386/pc: factor out cxl range end to helper
  i386/pc: factor out above-4g end to an helper
  i386/pc: pass pci_hole64_size to pc_memory_init()
  i386/pc: create pci-host qdev prior to pc_memory_init()
  hw/i386: add 4g boundary start to X86MachineState
  hw/cxl: Fix size of constant in interleave granularity function.
  hw/i386/pc: Always place CXL Memory Regions after device_memory
  hw/machine: Clear out left over CXL related pointer from move of state handling to machines.
  acpi/nvdimm: Define trace events for NVDIMM and substitute nvdimm_debug()

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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rth7680 committed Jul 26, 2022
2 parents f6cce6b + 0522be9 commit e5b6555
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Showing 16 changed files with 258 additions and 107 deletions.
35 changes: 16 additions & 19 deletions hw/acpi/nvdimm.c
Expand Up @@ -35,6 +35,7 @@
#include "hw/nvram/fw_cfg.h"
#include "hw/mem/nvdimm.h"
#include "qemu/nvdimm-utils.h"
#include "trace.h"

/*
* define Byte Addressable Persistent Memory (PM) Region according to
Expand Down Expand Up @@ -550,8 +551,8 @@ static void nvdimm_dsm_func_read_fit(NVDIMMState *state, NvdimmDsmIn *in,

fit = fit_buf->fit;

nvdimm_debug("Read FIT: offset 0x%x FIT size 0x%x Dirty %s.\n",
read_fit->offset, fit->len, fit_buf->dirty ? "Yes" : "No");
trace_acpi_nvdimm_read_fit(read_fit->offset, fit->len,
fit_buf->dirty ? "Yes" : "No");

if (read_fit->offset > fit->len) {
func_ret_status = NVDIMM_DSM_RET_STATUS_INVALID;
Expand Down Expand Up @@ -658,7 +659,7 @@ static void nvdimm_dsm_label_size(NVDIMMDevice *nvdimm, hwaddr dsm_mem_addr)
label_size = nvdimm->label_size;
mxfer = nvdimm_get_max_xfer_label_size();

nvdimm_debug("label_size 0x%x, max_xfer 0x%x.\n", label_size, mxfer);
trace_acpi_nvdimm_label_info(label_size, mxfer);

label_size_out.func_ret_status = cpu_to_le32(NVDIMM_DSM_RET_STATUS_SUCCESS);
label_size_out.label_size = cpu_to_le32(label_size);
Expand All @@ -674,20 +675,18 @@ static uint32_t nvdimm_rw_label_data_check(NVDIMMDevice *nvdimm,
uint32_t ret = NVDIMM_DSM_RET_STATUS_INVALID;

if (offset + length < offset) {
nvdimm_debug("offset 0x%x + length 0x%x is overflow.\n", offset,
length);
trace_acpi_nvdimm_label_overflow(offset, length);
return ret;
}

if (nvdimm->label_size < offset + length) {
nvdimm_debug("position 0x%x is beyond label data (len = %" PRIx64 ").\n",
offset + length, nvdimm->label_size);
trace_acpi_nvdimm_label_oversize(offset + length, nvdimm->label_size);
return ret;
}

if (length > nvdimm_get_max_xfer_label_size()) {
nvdimm_debug("length (0x%x) is larger than max_xfer (0x%x).\n",
length, nvdimm_get_max_xfer_label_size());
trace_acpi_nvdimm_label_xfer_exceed(length,
nvdimm_get_max_xfer_label_size());
return ret;
}

Expand All @@ -710,8 +709,8 @@ static void nvdimm_dsm_get_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in,
get_label_data->offset = le32_to_cpu(get_label_data->offset);
get_label_data->length = le32_to_cpu(get_label_data->length);

nvdimm_debug("Read Label Data: offset 0x%x length 0x%x.\n",
get_label_data->offset, get_label_data->length);
trace_acpi_nvdimm_read_label(get_label_data->offset,
get_label_data->length);

status = nvdimm_rw_label_data_check(nvdimm, get_label_data->offset,
get_label_data->length);
Expand Down Expand Up @@ -749,8 +748,8 @@ static void nvdimm_dsm_set_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in,
set_label_data->offset = le32_to_cpu(set_label_data->offset);
set_label_data->length = le32_to_cpu(set_label_data->length);

nvdimm_debug("Write Label Data: offset 0x%x length 0x%x.\n",
set_label_data->offset, set_label_data->length);
trace_acpi_nvdimm_write_label(set_label_data->offset,
set_label_data->length);

status = nvdimm_rw_label_data_check(nvdimm, set_label_data->offset,
set_label_data->length);
Expand Down Expand Up @@ -821,7 +820,7 @@ static void nvdimm_dsm_device(NvdimmDsmIn *in, hwaddr dsm_mem_addr)
static uint64_t
nvdimm_dsm_read(void *opaque, hwaddr addr, unsigned size)
{
nvdimm_debug("BUG: we never read _DSM IO Port.\n");
trace_acpi_nvdimm_read_io_port();
return 0;
}

Expand All @@ -832,7 +831,7 @@ nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
NvdimmDsmIn *in;
hwaddr dsm_mem_addr = val;

nvdimm_debug("dsm memory address 0x%" HWADDR_PRIx ".\n", dsm_mem_addr);
trace_acpi_nvdimm_dsm_mem_addr(dsm_mem_addr);

/*
* The DSM memory is mapped to guest address space so an evil guest
Expand All @@ -846,12 +845,10 @@ nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
in->function = le32_to_cpu(in->function);
in->handle = le32_to_cpu(in->handle);

nvdimm_debug("Revision 0x%x Handler 0x%x Function 0x%x.\n", in->revision,
in->handle, in->function);
trace_acpi_nvdimm_dsm_info(in->revision, in->handle, in->function);

if (in->revision != 0x1 /* Currently we only support DSM Spec Rev1. */) {
nvdimm_debug("Revision 0x%x is not supported, expect 0x%x.\n",
in->revision, 0x1);
trace_acpi_nvdimm_invalid_revision(in->revision);
nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT, dsm_mem_addr);
goto exit;
}
Expand Down
13 changes: 13 additions & 0 deletions hw/acpi/trace-events
Expand Up @@ -70,3 +70,16 @@ acpi_erst_reset_out(unsigned record_count) "record_count %u"
acpi_erst_post_load(void *header, unsigned slot_size) "header: 0x%p slot_size %u"
acpi_erst_class_init_in(void)
acpi_erst_class_init_out(void)

# nvdimm.c
acpi_nvdimm_read_fit(uint32_t offset, uint32_t len, const char *dirty) "Read FIT: offset 0x%" PRIx32 " FIT size 0x%" PRIx32 " Dirty %s"
acpi_nvdimm_label_info(uint32_t label_size, uint32_t mxfer) "label_size 0x%" PRIx32 ", max_xfer 0x%" PRIx32
acpi_nvdimm_label_overflow(uint32_t offset, uint32_t length) "offset 0x%" PRIx32 " + length 0x%" PRIx32 " is overflow"
acpi_nvdimm_label_oversize(uint32_t pos, uint64_t size) "position 0x%" PRIx32 " is beyond label data (len = %" PRIu64 ")"
acpi_nvdimm_label_xfer_exceed(uint32_t length, uint32_t max_xfer) "length (0x%" PRIx32 ") is larger than max_xfer (0x%" PRIx32 ")"
acpi_nvdimm_read_label(uint32_t offset, uint32_t length) "Read Label Data: offset 0x%" PRIx32 " length 0x%" PRIx32
acpi_nvdimm_write_label(uint32_t offset, uint32_t length) "Write Label Data: offset 0x%" PRIx32 " length 0x%" PRIx32
acpi_nvdimm_read_io_port(void) "Alert: we never read _DSM IO Port"
acpi_nvdimm_dsm_mem_addr(uint64_t dsm_mem_addr) "dsm memory address 0x%" PRIx64
acpi_nvdimm_dsm_info(uint32_t revision, uint32_t handle, uint32_t function) "Revision 0x%" PRIx32 " Handle 0x%" PRIx32 " Function 0x%" PRIx32
acpi_nvdimm_invalid_revision(uint32_t revision) "Revision 0x%" PRIx32 " is not supported, expect 0x1"
2 changes: 1 addition & 1 deletion hw/i386/acpi-build.c
Expand Up @@ -2024,7 +2024,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
build_srat_memory(table_data, mem_base, mem_len, i - 1,
MEM_AFFINITY_ENABLED);
}
mem_base = 1ULL << 32;
mem_base = x86ms->above_4g_mem_start;
mem_len = next_base - x86ms->below_4g_mem_size;
next_base = mem_base + mem_len;
}
Expand Down

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