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Merge tag 'pull-misc-20240408' of https://gitlab.com/rth7680/qemu int…
…o staging util/bufferiszero: Optimizations and cleanups, esp code removal target/m68k: Semihosting for non-coldfire cpus target/m68k: Fix fp accrued exception reporting target/hppa: Fix IIAOQ, IIASQ for pa2.0 target/sh4: Fixes to mac.l and mac.w saturation target/sh4: Fixes to illegal delay slot reporting linux-user: Cleanups for do_setsockopt linux-user: Add FITRIM ioctl linux-user: Fix waitid return of siginfo_t and rusage tcg/optimize: Do not attempt to constant fold neg_vec accel/tcg: Improve can_do_io management, mmio bug fix # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmYULZgdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+gIAgAqhtlPsZbnoXwqCNs # fafa/lTvpZYHl2kMJVRYtMmU661HD2HGARe3XCc7/5ZldvEXeQKPde9VrhmasIe8 # EChS3xh1U3J2zEUbnHHgnC9DDVE7uvG0lTazXQRe6WESTaRuBz5d6a0GZtSkH6F4 # AFp0lyKAxX4cn07aBFg0MJ/oPe21Ay9tTQv+5Ox2JOSvaK+FbW7hXisyReF5MVwq # WPQSELCSppdowxAcsHCD5Q8t/nwGfBbHKOjxLJCgf9xX1+9Wv3Ab8kMjRqaJWdXu # CvvJ/DigLZiHWbU2TxR2dPOIFSNZOIJY/BJ92aCHw7q9a4Ii2tkTPoJoM/qqlBq8 # 0oLPXg== # =00NK # -----END PGP SIGNATURE----- # gpg: Signature made Mon 08 Apr 2024 18:47:04 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-misc-20240408' of https://gitlab.com/rth7680/qemu: (35 commits) util/bufferiszero: Simplify test_buffer_is_zero_next_accel util/bufferiszero: Introduce biz_accel_fn typedef util/bufferiszero: Improve scalar variant util/bufferiszero: Optimize SSE2 and AVX2 variants util/bufferiszero: Remove useless prefetches util/bufferiszero: Reorganize for early test for acceleration util/bufferiszero: Remove AVX512 variant util/bufferiszero: Remove SSE4.1 variant accel/tcg: Improve can_do_io management target/s390x: Use insn_start from DisasContextBase target/riscv: Use insn_start from DisasContextBase target/microblaze: Use insn_start from DisasContextBase target/i386: Preserve DisasContextBase.insn_start across rewind target/hppa: Use insn_start from DisasContextBase target/arm: Use insn_start from DisasContextBase accel/tcg: Add insn_start to DisasContextBase tcg: Add TCGContext.emit_before_op target/m68k: Support semihosting on non-ColdFire targets target/m68k: Perform the semihosting test during translate target/m68k: Pass semihosting arg to exit ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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