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tcg: use tcg_debug_assert instead of assert (fix performance regression)
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The TCG code is quite performance sensitive, but at the same time can
also be quite tricky. That is why asserts that can be enabled with the
--enable-debug-tcg configure option.

This used to work the following way:

| #include "config.h"
|
| ...
|
| #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
| /* define it to suppress various consistency checks (faster) */
| #define NDEBUG
| #endif
|
| ...
|
| #include <assert.h>

Since commit 757e725 (tcg: Clean up includes) "config.h" as been
replaced by "qemu/osdep.h" which itself includes <assert.h>. As a
consequence the assertions are always enabled, even when using
--disable-debug-tcg, causing a performance regression, especially on
targets with many registers. For instance on qemu-system-ppc the
speed difference is about 15%.

tcg_debug_assert is controlled directly by CONFIG_DEBUG_TCG and already
uses in some places. This patch replaces all the calls to assert into
calss to tcg_debug_assert.

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-id: 1461228530-14852-1-git-send-email-aurelien@aurel32.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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aurel32 authored and pm215 committed Apr 21, 2016
1 parent b4850e5 commit eabb7b9
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Showing 11 changed files with 93 additions and 93 deletions.
24 changes: 12 additions & 12 deletions tcg/aarch64/tcg-target.inc.c
Expand Up @@ -67,7 +67,7 @@ static const int tcg_target_call_oarg_regs[1] = {
static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
{
ptrdiff_t offset = target - code_ptr;
assert(offset == sextract64(offset, 0, 26));
tcg_debug_assert(offset == sextract64(offset, 0, 26));
/* read instruction, mask away previous PC_REL26 parameter contents,
set the proper offset, then write back the instruction. */
*code_ptr = deposit32(*code_ptr, 0, 26, offset);
Expand All @@ -76,14 +76,14 @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
{
ptrdiff_t offset = target - code_ptr;
assert(offset == sextract64(offset, 0, 19));
tcg_debug_assert(offset == sextract64(offset, 0, 19));
*code_ptr = deposit32(*code_ptr, 5, 19, offset);
}

static inline void patch_reloc(tcg_insn_unit *code_ptr, int type,
intptr_t value, intptr_t addend)
{
assert(addend == 0);
tcg_debug_assert(addend == 0);
switch (type) {
case R_AARCH64_JUMP26:
case R_AARCH64_CALL26:
Expand Down Expand Up @@ -402,7 +402,7 @@ static void tcg_out_insn_3314(TCGContext *s, AArch64Insn insn,
insn |= pre << 24;
insn |= w << 23;

assert(ofs >= -0x200 && ofs < 0x200 && (ofs & 7) == 0);
tcg_debug_assert(ofs >= -0x200 && ofs < 0x200 && (ofs & 7) == 0);
insn |= (ofs & (0x7f << 3)) << (15 - 3);

tcg_out32(s, insn | r2 << 10 | rn << 5 | r1);
Expand All @@ -412,9 +412,9 @@ static void tcg_out_insn_3401(TCGContext *s, AArch64Insn insn, TCGType ext,
TCGReg rd, TCGReg rn, uint64_t aimm)
{
if (aimm > 0xfff) {
assert((aimm & 0xfff) == 0);
tcg_debug_assert((aimm & 0xfff) == 0);
aimm >>= 12;
assert(aimm <= 0xfff);
tcg_debug_assert(aimm <= 0xfff);
aimm |= 1 << 12; /* apply LSL 12 */
}
tcg_out32(s, insn | ext << 31 | aimm << 10 | rn << 5 | rd);
Expand Down Expand Up @@ -444,7 +444,7 @@ static void tcg_out_insn_3403(TCGContext *s, AArch64Insn insn, TCGType ext,
static void tcg_out_insn_3405(TCGContext *s, AArch64Insn insn, TCGType ext,
TCGReg rd, uint16_t half, unsigned shift)
{
assert((shift & ~0x30) == 0);
tcg_debug_assert((shift & ~0x30) == 0);
tcg_out32(s, insn | ext << 31 | shift << (21 - 4) | half << 5 | rd);
}

Expand Down Expand Up @@ -538,7 +538,7 @@ static void tcg_out_logicali(TCGContext *s, AArch64Insn insn, TCGType ext,
{
unsigned h, l, r, c;

assert(is_limm(limm));
tcg_debug_assert(is_limm(limm));

h = clz64(limm);
l = ctz64(limm);
Expand Down Expand Up @@ -793,7 +793,7 @@ static void tcg_out_cmp(TCGContext *s, TCGType ext, TCGReg a,
static inline void tcg_out_goto(TCGContext *s, tcg_insn_unit *target)
{
ptrdiff_t offset = target - s->code_ptr;
assert(offset == sextract64(offset, 0, 26));
tcg_debug_assert(offset == sextract64(offset, 0, 26));
tcg_out_insn(s, 3206, B, offset);
}

Expand Down Expand Up @@ -867,7 +867,7 @@ static void tcg_out_brcond(TCGContext *s, TCGMemOp ext, TCGCond c, TCGArg a,
offset = tcg_in32(s) >> 5;
} else {
offset = l->u.value_ptr - s->code_ptr;
assert(offset == sextract64(offset, 0, 19));
tcg_debug_assert(offset == sextract64(offset, 0, 19));
}

if (need_cmp) {
Expand Down Expand Up @@ -990,7 +990,7 @@ static void * const qemu_st_helpers[16] = {
static inline void tcg_out_adr(TCGContext *s, TCGReg rd, void *target)
{
ptrdiff_t offset = tcg_pcrel_diff(s, target);
assert(offset == sextract64(offset, 0, 21));
tcg_debug_assert(offset == sextract64(offset, 0, 21));
tcg_out_insn(s, 3406, ADR, rd, offset);
}

Expand Down Expand Up @@ -1294,7 +1294,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
#ifndef USE_DIRECT_JUMP
#error "USE_DIRECT_JUMP required for aarch64"
#endif
assert(s->tb_jmp_offset != NULL); /* consistency for USE_DIRECT_JUMP */
tcg_debug_assert(s->tb_jmp_offset != NULL); /* consistency for USE_DIRECT_JUMP */
s->tb_jmp_offset[a0] = tcg_current_code_size(s);
/* actual branch destination will be patched by
aarch64_tb_set_jmp_target later, beware retranslation. */
Expand Down
12 changes: 6 additions & 6 deletions tcg/arm/tcg-target.inc.c
Expand Up @@ -124,8 +124,8 @@ static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
static void patch_reloc(tcg_insn_unit *code_ptr, int type,
intptr_t value, intptr_t addend)
{
assert(type == R_ARM_PC24);
assert(addend == 0);
tcg_debug_assert(type == R_ARM_PC24);
tcg_debug_assert(addend == 0);
reloc_pc24(code_ptr, (tcg_insn_unit *)value);
}

Expand Down Expand Up @@ -492,7 +492,7 @@ static inline void tcg_out_dat_rI(TCGContext *s, int cond, int opc, TCGArg dst,
*/
if (rhs_is_const) {
int rot = encode_imm(rhs);
assert(rot >= 0);
tcg_debug_assert(rot >= 0);
tcg_out_dat_imm(s, cond, opc, dst, lhs, rotl(rhs, rot) | (rot << 7));
} else {
tcg_out_dat_reg(s, cond, opc, dst, lhs, rhs, SHIFT_IMM_LSL(0));
Expand All @@ -511,7 +511,7 @@ static void tcg_out_dat_rIK(TCGContext *s, int cond, int opc, int opinv,
if (rot < 0) {
rhs = ~rhs;
rot = encode_imm(rhs);
assert(rot >= 0);
tcg_debug_assert(rot >= 0);
opc = opinv;
}
tcg_out_dat_imm(s, cond, opc, dst, lhs, rotl(rhs, rot) | (rot << 7));
Expand All @@ -532,7 +532,7 @@ static void tcg_out_dat_rIN(TCGContext *s, int cond, int opc, int opneg,
if (rot < 0) {
rhs = -rhs;
rot = encode_imm(rhs);
assert(rot >= 0);
tcg_debug_assert(rot >= 0);
opc = opneg;
}
tcg_out_dat_imm(s, cond, opc, dst, lhs, rotl(rhs, rot) | (rot << 7));
Expand Down Expand Up @@ -1100,7 +1100,7 @@ static TCGReg NAME(TCGContext *s, TCGReg argreg, ARGTYPE arg) \
} else { \
int ofs = (argreg - 4) * 4; \
EXT_ARG; \
assert(ofs + 4 <= TCG_STATIC_CALL_ARGS_SIZE); \
tcg_debug_assert(ofs + 4 <= TCG_STATIC_CALL_ARGS_SIZE); \
tcg_out_st32_12(s, COND_AL, arg, TCG_REG_CALL_STACK, ofs); \
} \
return argreg + 1; \
Expand Down
8 changes: 4 additions & 4 deletions tcg/i386/tcg-target.inc.c
Expand Up @@ -425,7 +425,7 @@ static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x)
}
if (opc & P_DATA16) {
/* We should never be asking for both 16 and 64-bit operation. */
assert((opc & P_REXW) == 0);
tcg_debug_assert((opc & P_REXW) == 0);
tcg_out8(s, 0x66);
}
if (opc & P_ADDR32) {
Expand Down Expand Up @@ -599,7 +599,7 @@ static void tcg_out_modrm_sib_offset(TCGContext *s, int opc, int r, int rm,
if (index < 0) {
index = 4;
} else {
assert(index != TCG_REG_ESP);
tcg_debug_assert(index != TCG_REG_ESP);
}

tcg_out_opc(s, opc, r, rm, index);
Expand Down Expand Up @@ -745,14 +745,14 @@ static inline void tcg_out_rolw_8(TCGContext *s, int reg)
static inline void tcg_out_ext8u(TCGContext *s, int dest, int src)
{
/* movzbl */
assert(src < 4 || TCG_TARGET_REG_BITS == 64);
tcg_debug_assert(src < 4 || TCG_TARGET_REG_BITS == 64);
tcg_out_modrm(s, OPC_MOVZBL + P_REXB_RM, dest, src);
}

static void tcg_out_ext8s(TCGContext *s, int dest, int src, int rexw)
{
/* movsbl */
assert(src < 4 || TCG_TARGET_REG_BITS == 64);
tcg_debug_assert(src < 4 || TCG_TARGET_REG_BITS == 64);
tcg_out_modrm(s, OPC_MOVSBL + P_REXB_RM + rexw, dest, src);
}

Expand Down
6 changes: 3 additions & 3 deletions tcg/ia64/tcg-target.inc.c
Expand Up @@ -710,8 +710,8 @@ static uint64_t get_reloc_pcrel21b_slot2(tcg_insn_unit *pc)
static void patch_reloc(tcg_insn_unit *code_ptr, int type,
intptr_t value, intptr_t addend)
{
assert(addend == 0);
assert(type == R_IA64_PCREL21B);
tcg_debug_assert(addend == 0);
tcg_debug_assert(type == R_IA64_PCREL21B);
reloc_pcrel21b_slot2(code_ptr, (tcg_insn_unit *)value);
}

Expand Down Expand Up @@ -809,7 +809,7 @@ static inline void tcg_out_mov(TCGContext *s, TCGType type,

static inline uint64_t tcg_opc_movi_a(int qp, TCGReg dst, int64_t src)
{
assert(src == sextract64(src, 0, 22));
tcg_debug_assert(src == sextract64(src, 0, 22));
return tcg_opc_a5(qp, OPC_ADDL_A5, dst, src, TCG_REG_R0);
}

Expand Down
18 changes: 9 additions & 9 deletions tcg/mips/tcg-target.inc.c
Expand Up @@ -127,7 +127,7 @@ static inline uint32_t reloc_pc16_val(tcg_insn_unit *pc, tcg_insn_unit *target)
{
/* Let the compiler perform the right-shift as part of the arithmetic. */
ptrdiff_t disp = target - (pc + 1);
assert(disp == (int16_t)disp);
tcg_debug_assert(disp == (int16_t)disp);
return disp & 0xffff;
}

Expand All @@ -138,7 +138,7 @@ static inline void reloc_pc16(tcg_insn_unit *pc, tcg_insn_unit *target)

static inline uint32_t reloc_26_val(tcg_insn_unit *pc, tcg_insn_unit *target)
{
assert((((uintptr_t)pc ^ (uintptr_t)target) & 0xf0000000) == 0);
tcg_debug_assert((((uintptr_t)pc ^ (uintptr_t)target) & 0xf0000000) == 0);
return ((uintptr_t)target >> 2) & 0x3ffffff;
}

Expand All @@ -150,8 +150,8 @@ static inline void reloc_26(tcg_insn_unit *pc, tcg_insn_unit *target)
static void patch_reloc(tcg_insn_unit *code_ptr, int type,
intptr_t value, intptr_t addend)
{
assert(type == R_MIPS_PC16);
assert(addend == 0);
tcg_debug_assert(type == R_MIPS_PC16);
tcg_debug_assert(addend == 0);
reloc_pc16(code_ptr, (tcg_insn_unit *)value);
}

Expand Down Expand Up @@ -432,7 +432,7 @@ static bool tcg_out_opc_jmp(TCGContext *s, MIPSInsn opc, void *target)
if ((from ^ dest) & -(1 << 28)) {
return false;
}
assert((dest & 3) == 0);
tcg_debug_assert((dest & 3) == 0);

inst = opc;
inst |= (dest >> 2) & 0x3ffffff;
Expand Down Expand Up @@ -807,9 +807,9 @@ static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
TCGReg tmp0 = TCG_TMP0;
TCGReg tmp1 = ret;

assert(ret != TCG_TMP0);
tcg_debug_assert(ret != TCG_TMP0);
if (ret == ah || ret == bh) {
assert(ret != TCG_TMP1);
tcg_debug_assert(ret != TCG_TMP1);
tmp1 = TCG_TMP1;
}

Expand Down Expand Up @@ -1470,8 +1470,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_and_i32:
if (c2 && a2 != (uint16_t)a2) {
int msb = ctz32(~a2) - 1;
assert(use_mips32r2_instructions);
assert(is_p2m1(a2));
tcg_debug_assert(use_mips32r2_instructions);
tcg_debug_assert(is_p2m1(a2));
tcg_out_opc_bf(s, OPC_EXT, a0, a1, msb, 0);
break;
}
Expand Down
4 changes: 2 additions & 2 deletions tcg/optimize.c
Expand Up @@ -959,12 +959,12 @@ void tcg_optimize(TCGContext *s)
}

if (partmask == 0) {
assert(nb_oargs == 1);
tcg_debug_assert(nb_oargs == 1);
tcg_opt_gen_movi(s, op, args, args[0], 0);
continue;
}
if (affected == 0) {
assert(nb_oargs == 1);
tcg_debug_assert(nb_oargs == 1);
tcg_opt_gen_mov(s, op, args, args[0], args[1]);
continue;
}
Expand Down
22 changes: 11 additions & 11 deletions tcg/ppc/tcg-target.inc.c
Expand Up @@ -207,7 +207,7 @@ static inline bool in_range_b(tcg_target_long target)
static uint32_t reloc_pc24_val(tcg_insn_unit *pc, tcg_insn_unit *target)
{
ptrdiff_t disp = tcg_ptr_byte_diff(target, pc);
assert(in_range_b(disp));
tcg_debug_assert(in_range_b(disp));
return disp & 0x3fffffc;
}

Expand All @@ -219,7 +219,7 @@ static void reloc_pc24(tcg_insn_unit *pc, tcg_insn_unit *target)
static uint16_t reloc_pc14_val(tcg_insn_unit *pc, tcg_insn_unit *target)
{
ptrdiff_t disp = tcg_ptr_byte_diff(target, pc);
assert(disp == (int16_t) disp);
tcg_debug_assert(disp == (int16_t) disp);
return disp & 0xfffc;
}

Expand All @@ -245,7 +245,7 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type,
{
tcg_insn_unit *target = (tcg_insn_unit *)value;

assert(addend == 0);
tcg_debug_assert(addend == 0);
switch (type) {
case R_PPC_REL14:
reloc_pc14(code_ptr, target);
Expand Down Expand Up @@ -565,7 +565,7 @@ static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
static inline void tcg_out_rld(TCGContext *s, int op, TCGReg ra, TCGReg rs,
int sh, int mb)
{
assert(TCG_TARGET_REG_BITS == 64);
tcg_debug_assert(TCG_TARGET_REG_BITS == 64);
sh = SH(sh & 0x1f) | (((sh >> 5) & 1) << 1);
mb = MB64((mb >> 5) | ((mb << 1) & 0x3f));
tcg_out32(s, op | RA(ra) | RS(rs) | sh | mb);
Expand Down Expand Up @@ -718,7 +718,7 @@ static void tcg_out_andi64(TCGContext *s, TCGReg dst, TCGReg src, uint64_t c)
{
int mb, me;

assert(TCG_TARGET_REG_BITS == 64);
tcg_debug_assert(TCG_TARGET_REG_BITS == 64);
if (mask64_operand(c, &mb, &me)) {
if (mb == 0) {
tcg_out_rld(s, RLDICR, dst, src, 0, me);
Expand Down Expand Up @@ -834,7 +834,7 @@ static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret,
{
int opi, opx;

assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32);
tcg_debug_assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32);
if (type == TCG_TYPE_I32) {
opi = LWZ, opx = LWZX;
} else {
Expand All @@ -848,7 +848,7 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
{
int opi, opx;

assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32);
tcg_debug_assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32);
if (type == TCG_TYPE_I32) {
opi = STW, opx = STWX;
} else {
Expand Down Expand Up @@ -981,7 +981,7 @@ static void tcg_out_setcond(TCGContext *s, TCGType type, TCGCond cond,
{
int crop, sh;

assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32);
tcg_debug_assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32);

/* Ignore high bits of a potential constant arg2. */
if (type == TCG_TYPE_I32) {
Expand Down Expand Up @@ -1251,11 +1251,11 @@ void ppc_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr)
diff = addr - (uintptr_t)tb_ret_addr;
lo = (int16_t)diff;
hi = (int32_t)(diff - lo);
assert(diff == hi + lo);
tcg_debug_assert(diff == hi + lo);
i1 = ADDIS | TAI(TCG_REG_TMP1, TCG_REG_RA, hi >> 16);
i2 = ADDI | TAI(TCG_REG_TMP1, TCG_REG_TMP1, lo);
} else {
assert(TCG_TARGET_REG_BITS == 32 || addr == (int32_t)addr);
tcg_debug_assert(TCG_TARGET_REG_BITS == 32 || addr == (int32_t)addr);
i1 = ADDIS | TAI(TCG_REG_TMP1, 0, addr >> 16);
i2 = ORI | SAI(TCG_REG_TMP1, TCG_REG_TMP1, addr);
}
Expand Down Expand Up @@ -1857,7 +1857,7 @@ static void tcg_target_qemu_prologue(TCGContext *s)
}

/* Epilogue */
assert(tb_ret_addr == s->code_ptr);
tcg_debug_assert(tb_ret_addr == s->code_ptr);

tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R0, TCG_REG_R1, FRAME_SIZE+LR_OFFSET);
for (i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); ++i) {
Expand Down
6 changes: 3 additions & 3 deletions tcg/s390/tcg-target.inc.c
Expand Up @@ -348,15 +348,15 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type,
intptr_t value, intptr_t addend)
{
intptr_t pcrel2 = (tcg_insn_unit *)value - (code_ptr - 1);
assert(addend == -2);
tcg_debug_assert(addend == -2);

switch (type) {
case R_390_PC16DBL:
assert(pcrel2 == (int16_t)pcrel2);
tcg_debug_assert(pcrel2 == (int16_t)pcrel2);
tcg_patch16(code_ptr, pcrel2);
break;
case R_390_PC32DBL:
assert(pcrel2 == (int32_t)pcrel2);
tcg_debug_assert(pcrel2 == (int32_t)pcrel2);
tcg_patch32(code_ptr, pcrel2);
break;
default:
Expand Down

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