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target/sparc: Clear cexc and ftt in do_check_ieee_exceptions
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Don't do the clearing explicitly before each FPop,
rather do it as part of the rest of exception handling.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231103173841.33651-18-richard.henderson@linaro.org>
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@rth7680
rth7680 committed Feb 3, 2024
1 parent 49bb972 commit efeb8b0
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Showing 2 changed files with 2 additions and 16 deletions.
2 changes: 2 additions & 0 deletions target/sparc/fop_helper.c
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Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,8 @@ static target_ulong do_check_ieee_exceptions(CPUSPARCState *env, uintptr_t ra)
target_ulong status = get_float_exception_flags(&env->fp_status);
target_ulong fsr = env->fsr;

fsr &= FSR_FTT_CEXC_NMASK;

if (unlikely(status)) {
/* Keep exception flags clear for next time. */
set_float_exception_flags(0, &env->fp_status);
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16 changes: 0 additions & 16 deletions target/sparc/translate.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4524,7 +4524,6 @@ static bool do_env_ff(DisasContext *dc, arg_r_r *a,
return true;
}

gen_op_clear_ieee_excp_and_FTT();
tmp = gen_load_fpr_F(dc, a->rs);
func(tmp, tcg_env, tmp);
gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env);
Expand All @@ -4546,7 +4545,6 @@ static bool do_env_fd(DisasContext *dc, arg_r_r *a,
return true;
}

gen_op_clear_ieee_excp_and_FTT();
dst = tcg_temp_new_i32();
src = gen_load_fpr_D(dc, a->rs);
func(dst, tcg_env, src);
Expand Down Expand Up @@ -4590,7 +4588,6 @@ static bool do_env_dd(DisasContext *dc, arg_r_r *a,
return true;
}

gen_op_clear_ieee_excp_and_FTT();
dst = gen_dest_fpr_D(dc, a->rd);
src = gen_load_fpr_D(dc, a->rs);
func(dst, tcg_env, src);
Expand All @@ -4613,7 +4610,6 @@ static bool do_env_df(DisasContext *dc, arg_r_r *a,
return true;
}

gen_op_clear_ieee_excp_and_FTT();
dst = gen_dest_fpr_D(dc, a->rd);
src = gen_load_fpr_F(dc, a->rs);
func(dst, tcg_env, src);
Expand Down Expand Up @@ -4661,8 +4657,6 @@ static bool do_env_qq(DisasContext *dc, arg_r_r *a,
return true;
}

gen_op_clear_ieee_excp_and_FTT();

t = gen_load_fpr_Q(dc, a->rs);
func(t, tcg_env, t);
gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env);
Expand All @@ -4685,7 +4679,6 @@ static bool do_env_fq(DisasContext *dc, arg_r_r *a,
return true;
}

gen_op_clear_ieee_excp_and_FTT();
src = gen_load_fpr_Q(dc, a->rs);
dst = tcg_temp_new_i32();
func(dst, tcg_env, src);
Expand All @@ -4710,7 +4703,6 @@ static bool do_env_dq(DisasContext *dc, arg_r_r *a,
return true;
}

gen_op_clear_ieee_excp_and_FTT();
src = gen_load_fpr_Q(dc, a->rs);
dst = gen_dest_fpr_D(dc, a->rd);
func(dst, tcg_env, src);
Expand Down Expand Up @@ -4808,7 +4800,6 @@ static bool do_env_fff(DisasContext *dc, arg_r_r_r *a,
return true;
}

gen_op_clear_ieee_excp_and_FTT();
src1 = gen_load_fpr_F(dc, a->rs1);
src2 = gen_load_fpr_F(dc, a->rs2);
func(src1, tcg_env, src1, src2);
Expand Down Expand Up @@ -4903,7 +4894,6 @@ static bool do_env_ddd(DisasContext *dc, arg_r_r_r *a,
return true;
}

gen_op_clear_ieee_excp_and_FTT();
dst = gen_dest_fpr_D(dc, a->rd);
src1 = gen_load_fpr_D(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
Expand All @@ -4930,7 +4920,6 @@ static bool trans_FsMULd(DisasContext *dc, arg_r_r_r *a)
return raise_unimpfpop(dc);
}

gen_op_clear_ieee_excp_and_FTT();
dst = gen_dest_fpr_D(dc, a->rd);
src1 = gen_load_fpr_F(dc, a->rs1);
src2 = gen_load_fpr_F(dc, a->rs2);
Expand Down Expand Up @@ -4972,7 +4961,6 @@ static bool do_env_qqq(DisasContext *dc, arg_r_r_r *a,
return true;
}

gen_op_clear_ieee_excp_and_FTT();
src1 = gen_load_fpr_Q(dc, a->rs1);
src2 = gen_load_fpr_Q(dc, a->rs2);
func(src1, tcg_env, src1, src2);
Expand All @@ -4998,7 +4986,6 @@ static bool trans_FdMULq(DisasContext *dc, arg_r_r_r *a)
return true;
}

gen_op_clear_ieee_excp_and_FTT();
src1 = gen_load_fpr_D(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
dst = tcg_temp_new_i128();
Expand Down Expand Up @@ -5087,7 +5074,6 @@ static bool do_fcmps(DisasContext *dc, arg_FCMPs *a, bool e)
return true;
}

gen_op_clear_ieee_excp_and_FTT();
src1 = gen_load_fpr_F(dc, a->rs1);
src2 = gen_load_fpr_F(dc, a->rs2);
if (e) {
Expand All @@ -5112,7 +5098,6 @@ static bool do_fcmpd(DisasContext *dc, arg_FCMPd *a, bool e)
return true;
}

gen_op_clear_ieee_excp_and_FTT();
src1 = gen_load_fpr_D(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
if (e) {
Expand Down Expand Up @@ -5140,7 +5125,6 @@ static bool do_fcmpq(DisasContext *dc, arg_FCMPq *a, bool e)
return true;
}

gen_op_clear_ieee_excp_and_FTT();
src1 = gen_load_fpr_Q(dc, a->rs1);
src2 = gen_load_fpr_Q(dc, a->rs2);
if (e) {
Expand Down

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