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linux-user: Fix MIPS N64 trap and break instruction bug
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For the MIPS N64 ABI when QEMU reads the break/trap instruction so that
it can inspect the break/trap code it reads 8 rather than 4 bytes
which means it finds the code field from the instruction after the
break/trap instruction.  This then causes the break/trap handling
code to fail because it does not understand the code number.

The fix forces QEMU to always read 4 bytes of instruction data rather
than deciding how much to read based on the ABI.

Signed-off-by: Andrew Bennett <andrew.bennett@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
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andrewb-IMG authored and Leon Alrae committed Jul 15, 2015
1 parent 26e7e98 commit f01a361
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions linux-user/main.c
Expand Up @@ -2577,7 +2577,7 @@ void cpu_loop(CPUMIPSState *env)
code = (trap_instr >> 6) & 0x3f;
}
} else {
ret = get_user_ual(trap_instr, env->active_tc.PC);
ret = get_user_u32(trap_instr, env->active_tc.PC);
if (ret != 0) {
goto error;
}
Expand Down Expand Up @@ -2611,7 +2611,7 @@ void cpu_loop(CPUMIPSState *env)

trap_instr = (instr[0] << 16) | instr[1];
} else {
ret = get_user_ual(trap_instr, env->active_tc.PC);
ret = get_user_u32(trap_instr, env->active_tc.PC);
}

if (ret != 0) {
Expand Down

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