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bcm2835-mmc.c
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bcm2835-mmc.c
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/*
* BCM2835 MMC host driver.
*
* Author: Gellert Weisz <gellert@raspberrypi.org>
* Copyright 2014
*
* Based on
* sdhci-bcm2708.c by Broadcom
* sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko
* sdhci.c and sdhci-pci.c by Pierre Ossman
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/mmc/mmc.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sd.h>
#include <linux/scatterlist.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/blkdev.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/of_dma.h>
#include "sdhci.h"
#define DRIVER_NAME "mmc-bcm2835"
#define DBG(f, x...) \
pr_debug(DRIVER_NAME " [%s()]: " f, __func__, ## x)
#ifndef CONFIG_MMC_BCM2835_DMA
#define FORCE_PIO
#endif
/* the inclusive limit in bytes under which PIO will be used instead of DMA */
#ifdef CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
#define PIO_DMA_BARRIER CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
#else
#define PIO_DMA_BARRIER 00
#endif
#define MIN_FREQ 400000
#define TIMEOUT_VAL 0xE
#define BCM2835_SDHCI_WRITE_DELAY(f) (((2 * 1000000) / f) + 1)
#ifndef BCM2708_PERI_BASE
#define BCM2708_PERI_BASE 0x20000000
#endif
/* FIXME: Needs IOMMU support */
#define BCM2835_VCMMU_SHIFT (0x7E000000 - BCM2708_PERI_BASE)
unsigned mmc_debug;
unsigned mmc_debug2;
struct bcm2835_host {
spinlock_t lock;
void __iomem *ioaddr;
u32 phys_addr;
struct mmc_host *mmc;
u32 timeout;
int clock; /* Current clock speed */
u8 pwr; /* Current voltage */
unsigned int max_clk; /* Max possible freq */
unsigned int timeout_clk; /* Timeout freq (KHz) */
unsigned int clk_mul; /* Clock Muliplier value */
struct tasklet_struct finish_tasklet; /* Tasklet structures */
struct timer_list timer; /* Timer for timeouts */
struct sg_mapping_iter sg_miter; /* SG state for PIO */
unsigned int blocks; /* remaining PIO blocks */
int irq; /* Device IRQ */
u32 ier; /* cached registers */
struct mmc_request *mrq; /* Current request */
struct mmc_command *cmd; /* Current command */
struct mmc_data *data; /* Current data request */
unsigned int data_early:1; /* Data finished before cmd */
wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
u32 thread_isr;
u32 shadow;
/*DMA part*/
struct dma_chan *dma_chan_rx; /* DMA channel for reads */
struct dma_chan *dma_chan_tx; /* DMA channel for writes */
struct dma_async_tx_descriptor *tx_desc; /* descriptor */
bool have_dma;
bool use_dma;
/*end of DMA part*/
int max_delay; /* maximum length of time spent waiting */
int flags; /* Host attributes */
#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */
#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */
#define SDHCI_AUTO_CMD12 (1<<6) /* Auto CMD12 support */
#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */
#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */
u32 overclock_50; /* frequency to use when 50MHz is requested (in MHz) */
u32 max_overclock; /* Highest reported */
};
static inline void bcm2835_mmc_writel(struct bcm2835_host *host, u32 val, int reg, int from)
{
unsigned delay;
lockdep_assert_held_once(&host->lock);
writel(val, host->ioaddr + reg);
udelay(BCM2835_SDHCI_WRITE_DELAY(max(host->clock, MIN_FREQ)));
delay = ((mmc_debug >> 16) & 0xf) << ((mmc_debug >> 20) & 0xf);
if (delay && !((1<<from) & mmc_debug2))
udelay(delay);
}
static inline void mmc_raw_writel(struct bcm2835_host *host, u32 val, int reg)
{
unsigned delay;
lockdep_assert_held_once(&host->lock);
writel(val, host->ioaddr + reg);
delay = ((mmc_debug >> 24) & 0xf) << ((mmc_debug >> 28) & 0xf);
if (delay)
udelay(delay);
}
static inline u32 bcm2835_mmc_readl(struct bcm2835_host *host, int reg)
{
lockdep_assert_held_once(&host->lock);
return readl(host->ioaddr + reg);
}
static inline void bcm2835_mmc_writew(struct bcm2835_host *host, u16 val, int reg)
{
u32 oldval = (reg == SDHCI_COMMAND) ? host->shadow :
bcm2835_mmc_readl(host, reg & ~3);
u32 word_num = (reg >> 1) & 1;
u32 word_shift = word_num * 16;
u32 mask = 0xffff << word_shift;
u32 newval = (oldval & ~mask) | (val << word_shift);
if (reg == SDHCI_TRANSFER_MODE)
host->shadow = newval;
else
bcm2835_mmc_writel(host, newval, reg & ~3, 0);
}
static inline void bcm2835_mmc_writeb(struct bcm2835_host *host, u8 val, int reg)
{
u32 oldval = bcm2835_mmc_readl(host, reg & ~3);
u32 byte_num = reg & 3;
u32 byte_shift = byte_num * 8;
u32 mask = 0xff << byte_shift;
u32 newval = (oldval & ~mask) | (val << byte_shift);
bcm2835_mmc_writel(host, newval, reg & ~3, 1);
}
static inline u16 bcm2835_mmc_readw(struct bcm2835_host *host, int reg)
{
u32 val = bcm2835_mmc_readl(host, (reg & ~3));
u32 word_num = (reg >> 1) & 1;
u32 word_shift = word_num * 16;
u32 word = (val >> word_shift) & 0xffff;
return word;
}
static inline u8 bcm2835_mmc_readb(struct bcm2835_host *host, int reg)
{
u32 val = bcm2835_mmc_readl(host, (reg & ~3));
u32 byte_num = reg & 3;
u32 byte_shift = byte_num * 8;
u32 byte = (val >> byte_shift) & 0xff;
return byte;
}
static void bcm2835_mmc_unsignal_irqs(struct bcm2835_host *host, u32 clear)
{
u32 ier;
ier = bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE);
ier &= ~clear;
/* change which requests generate IRQs - makes no difference to
the content of SDHCI_INT_STATUS, or the need to acknowledge IRQs */
bcm2835_mmc_writel(host, ier, SDHCI_SIGNAL_ENABLE, 2);
}
static void bcm2835_mmc_dumpregs(struct bcm2835_host *host)
{
pr_debug(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n",
mmc_hostname(host->mmc));
pr_debug(DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
bcm2835_mmc_readl(host, SDHCI_DMA_ADDRESS),
bcm2835_mmc_readw(host, SDHCI_HOST_VERSION));
pr_debug(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
bcm2835_mmc_readw(host, SDHCI_BLOCK_SIZE),
bcm2835_mmc_readw(host, SDHCI_BLOCK_COUNT));
pr_debug(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
bcm2835_mmc_readl(host, SDHCI_ARGUMENT),
bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE));
pr_debug(DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE),
bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL));
pr_debug(DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
bcm2835_mmc_readb(host, SDHCI_POWER_CONTROL),
bcm2835_mmc_readb(host, SDHCI_BLOCK_GAP_CONTROL));
pr_debug(DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
bcm2835_mmc_readb(host, SDHCI_WAKE_UP_CONTROL),
bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL));
pr_debug(DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
bcm2835_mmc_readb(host, SDHCI_TIMEOUT_CONTROL),
bcm2835_mmc_readl(host, SDHCI_INT_STATUS));
pr_debug(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
bcm2835_mmc_readl(host, SDHCI_INT_ENABLE),
bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE));
pr_debug(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
bcm2835_mmc_readw(host, SDHCI_ACMD12_ERR),
bcm2835_mmc_readw(host, SDHCI_SLOT_INT_STATUS));
pr_debug(DRIVER_NAME ": Caps: 0x%08x | Caps_1: 0x%08x\n",
bcm2835_mmc_readl(host, SDHCI_CAPABILITIES),
bcm2835_mmc_readl(host, SDHCI_CAPABILITIES_1));
pr_debug(DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n",
bcm2835_mmc_readw(host, SDHCI_COMMAND),
bcm2835_mmc_readl(host, SDHCI_MAX_CURRENT));
pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n",
bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2));
pr_debug(DRIVER_NAME ": ===========================================\n");
}
static void bcm2835_mmc_reset(struct bcm2835_host *host, u8 mask)
{
unsigned long timeout;
unsigned long flags;
spin_lock_irqsave(&host->lock, flags);
bcm2835_mmc_writeb(host, mask, SDHCI_SOFTWARE_RESET);
if (mask & SDHCI_RESET_ALL)
host->clock = 0;
/* Wait max 100 ms */
timeout = 100;
/* hw clears the bit when it's done */
while (bcm2835_mmc_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
if (timeout == 0) {
pr_err("%s: Reset 0x%x never completed.\n",
mmc_hostname(host->mmc), (int)mask);
bcm2835_mmc_dumpregs(host);
return;
}
timeout--;
spin_unlock_irqrestore(&host->lock, flags);
mdelay(1);
spin_lock_irqsave(&host->lock, flags);
}
if (100-timeout > 10 && 100-timeout > host->max_delay) {
host->max_delay = 100-timeout;
pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
}
spin_unlock_irqrestore(&host->lock, flags);
}
static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
static void bcm2835_mmc_init(struct bcm2835_host *host, int soft)
{
unsigned long flags;
if (soft)
bcm2835_mmc_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA);
else
bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT |
SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC |
SDHCI_INT_TIMEOUT | SDHCI_INT_DATA_END |
SDHCI_INT_RESPONSE;
spin_lock_irqsave(&host->lock, flags);
bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 3);
bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 3);
spin_unlock_irqrestore(&host->lock, flags);
if (soft) {
/* force clock reconfiguration */
host->clock = 0;
bcm2835_mmc_set_ios(host->mmc, &host->mmc->ios);
}
}
static void bcm2835_mmc_finish_data(struct bcm2835_host *host);
static void bcm2835_mmc_dma_complete(void *param)
{
struct bcm2835_host *host = param;
struct dma_chan *dma_chan;
unsigned long flags;
u32 dir_data;
spin_lock_irqsave(&host->lock, flags);
if (host->data && !(host->data->flags & MMC_DATA_WRITE)) {
/* otherwise handled in SDHCI IRQ */
dma_chan = host->dma_chan_rx;
dir_data = DMA_FROM_DEVICE;
dma_unmap_sg(dma_chan->device->dev,
host->data->sg, host->data->sg_len,
dir_data);
bcm2835_mmc_finish_data(host);
}
spin_unlock_irqrestore(&host->lock, flags);
}
static void bcm2835_bcm2835_mmc_read_block_pio(struct bcm2835_host *host)
{
unsigned long flags;
size_t blksize, len, chunk;
u32 uninitialized_var(scratch);
u8 *buf;
blksize = host->data->blksz;
chunk = 0;
local_irq_save(flags);
while (blksize) {
if (!sg_miter_next(&host->sg_miter))
BUG();
len = min(host->sg_miter.length, blksize);
blksize -= len;
host->sg_miter.consumed = len;
buf = host->sg_miter.addr;
while (len) {
if (chunk == 0) {
scratch = bcm2835_mmc_readl(host, SDHCI_BUFFER);
chunk = 4;
}
*buf = scratch & 0xFF;
buf++;
scratch >>= 8;
chunk--;
len--;
}
}
sg_miter_stop(&host->sg_miter);
local_irq_restore(flags);
}
static void bcm2835_bcm2835_mmc_write_block_pio(struct bcm2835_host *host)
{
unsigned long flags;
size_t blksize, len, chunk;
u32 scratch;
u8 *buf;
blksize = host->data->blksz;
chunk = 0;
chunk = 0;
scratch = 0;
local_irq_save(flags);
while (blksize) {
if (!sg_miter_next(&host->sg_miter))
BUG();
len = min(host->sg_miter.length, blksize);
blksize -= len;
host->sg_miter.consumed = len;
buf = host->sg_miter.addr;
while (len) {
scratch |= (u32)*buf << (chunk * 8);
buf++;
chunk++;
len--;
if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
mmc_raw_writel(host, scratch, SDHCI_BUFFER);
chunk = 0;
scratch = 0;
}
}
}
sg_miter_stop(&host->sg_miter);
local_irq_restore(flags);
}
static void bcm2835_mmc_transfer_pio(struct bcm2835_host *host)
{
u32 mask;
BUG_ON(!host->data);
if (host->blocks == 0)
return;
if (host->data->flags & MMC_DATA_READ)
mask = SDHCI_DATA_AVAILABLE;
else
mask = SDHCI_SPACE_AVAILABLE;
while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
if (host->data->flags & MMC_DATA_READ)
bcm2835_bcm2835_mmc_read_block_pio(host);
else
bcm2835_bcm2835_mmc_write_block_pio(host);
host->blocks--;
/* QUIRK used in sdhci.c removes the 'if' */
/* but it seems this is unnecessary */
if (host->blocks == 0)
break;
}
}
static void bcm2835_mmc_transfer_dma(struct bcm2835_host *host)
{
u32 len, dir_data, dir_slave;
struct dma_async_tx_descriptor *desc = NULL;
struct dma_chan *dma_chan;
WARN_ON(!host->data);
if (!host->data)
return;
if (host->blocks == 0)
return;
if (host->data->flags & MMC_DATA_READ) {
dma_chan = host->dma_chan_rx;
dir_data = DMA_FROM_DEVICE;
dir_slave = DMA_DEV_TO_MEM;
} else {
dma_chan = host->dma_chan_tx;
dir_data = DMA_TO_DEVICE;
dir_slave = DMA_MEM_TO_DEV;
}
BUG_ON(!dma_chan->device);
BUG_ON(!dma_chan->device->dev);
BUG_ON(!host->data->sg);
len = dma_map_sg(dma_chan->device->dev, host->data->sg,
host->data->sg_len, dir_data);
if (len > 0) {
desc = dmaengine_prep_slave_sg(dma_chan, host->data->sg,
len, dir_slave,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
} else {
dev_err(mmc_dev(host->mmc), "dma_map_sg returned zero length\n");
}
if (desc) {
unsigned long flags;
spin_lock_irqsave(&host->lock, flags);
bcm2835_mmc_unsignal_irqs(host, SDHCI_INT_DATA_AVAIL |
SDHCI_INT_SPACE_AVAIL);
host->tx_desc = desc;
desc->callback = bcm2835_mmc_dma_complete;
desc->callback_param = host;
spin_unlock_irqrestore(&host->lock, flags);
dmaengine_submit(desc);
dma_async_issue_pending(dma_chan);
}
}
static void bcm2835_mmc_set_transfer_irqs(struct bcm2835_host *host)
{
u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
if (host->use_dma)
host->ier = (host->ier & ~pio_irqs) | dma_irqs;
else
host->ier = (host->ier & ~dma_irqs) | pio_irqs;
bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 4);
bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 4);
}
static void bcm2835_mmc_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd)
{
u8 count;
struct mmc_data *data = cmd->data;
WARN_ON(host->data);
if (data || (cmd->flags & MMC_RSP_BUSY)) {
count = TIMEOUT_VAL;
bcm2835_mmc_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
}
if (!data)
return;
/* Sanity checks */
BUG_ON(data->blksz * data->blocks > 524288);
BUG_ON(data->blksz > host->mmc->max_blk_size);
BUG_ON(data->blocks > 65535);
host->data = data;
host->data_early = 0;
host->data->bytes_xfered = 0;
if (!(host->flags & SDHCI_REQ_USE_DMA)) {
int flags;
flags = SG_MITER_ATOMIC;
if (host->data->flags & MMC_DATA_READ)
flags |= SG_MITER_TO_SG;
else
flags |= SG_MITER_FROM_SG;
sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
host->blocks = data->blocks;
}
host->use_dma = host->have_dma && data->blocks > PIO_DMA_BARRIER;
bcm2835_mmc_set_transfer_irqs(host);
/* Set the DMA boundary value and block size */
bcm2835_mmc_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
data->blksz), SDHCI_BLOCK_SIZE);
bcm2835_mmc_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
BUG_ON(!host->data);
}
static void bcm2835_mmc_set_transfer_mode(struct bcm2835_host *host,
struct mmc_command *cmd)
{
u16 mode;
struct mmc_data *data = cmd->data;
if (data == NULL) {
/* clear Auto CMD settings for no data CMDs */
mode = bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE);
bcm2835_mmc_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE);
return;
}
WARN_ON(!host->data);
mode = SDHCI_TRNS_BLK_CNT_EN;
if ((mmc_op_multi(cmd->opcode) || data->blocks > 1)) {
mode |= SDHCI_TRNS_MULTI;
/*
* If we are sending CMD23, CMD12 never gets sent
* on successful completion (so no Auto-CMD12).
*/
if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12))
mode |= SDHCI_TRNS_AUTO_CMD12;
else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) {
mode |= SDHCI_TRNS_AUTO_CMD23;
bcm2835_mmc_writel(host, host->mrq->sbc->arg, SDHCI_ARGUMENT2, 5);
}
}
if (data->flags & MMC_DATA_READ)
mode |= SDHCI_TRNS_READ;
if (host->flags & SDHCI_REQ_USE_DMA)
mode |= SDHCI_TRNS_DMA;
bcm2835_mmc_writew(host, mode, SDHCI_TRANSFER_MODE);
}
void bcm2835_mmc_send_command(struct bcm2835_host *host, struct mmc_command *cmd)
{
int flags;
u32 mask;
unsigned long timeout;
WARN_ON(host->cmd);
/* Wait max 10 ms */
timeout = 1000;
mask = SDHCI_CMD_INHIBIT;
if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
mask |= SDHCI_DATA_INHIBIT;
/* We shouldn't wait for data inihibit for stop commands, even
though they might use busy signaling */
if (host->mrq->data && (cmd == host->mrq->data->stop))
mask &= ~SDHCI_DATA_INHIBIT;
while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
if (timeout == 0) {
pr_err("%s: Controller never released inhibit bit(s).\n",
mmc_hostname(host->mmc));
bcm2835_mmc_dumpregs(host);
cmd->error = -EIO;
tasklet_schedule(&host->finish_tasklet);
return;
}
timeout--;
udelay(10);
}
if ((1000-timeout)/100 > 1 && (1000-timeout)/100 > host->max_delay) {
host->max_delay = (1000-timeout)/100;
pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
}
timeout = jiffies;
#ifdef CONFIG_ARCH_BCM2835
if (!cmd->data && cmd->busy_timeout > 9000)
timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ;
else
#endif
timeout += 10 * HZ;
mod_timer(&host->timer, timeout);
host->cmd = cmd;
bcm2835_mmc_prepare_data(host, cmd);
bcm2835_mmc_writel(host, cmd->arg, SDHCI_ARGUMENT, 6);
bcm2835_mmc_set_transfer_mode(host, cmd);
if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
pr_err("%s: Unsupported response type!\n",
mmc_hostname(host->mmc));
cmd->error = -EINVAL;
tasklet_schedule(&host->finish_tasklet);
return;
}
if (!(cmd->flags & MMC_RSP_PRESENT))
flags = SDHCI_CMD_RESP_NONE;
else if (cmd->flags & MMC_RSP_136)
flags = SDHCI_CMD_RESP_LONG;
else if (cmd->flags & MMC_RSP_BUSY)
flags = SDHCI_CMD_RESP_SHORT_BUSY;
else
flags = SDHCI_CMD_RESP_SHORT;
if (cmd->flags & MMC_RSP_CRC)
flags |= SDHCI_CMD_CRC;
if (cmd->flags & MMC_RSP_OPCODE)
flags |= SDHCI_CMD_INDEX;
if (cmd->data)
flags |= SDHCI_CMD_DATA;
bcm2835_mmc_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
}
static void bcm2835_mmc_finish_data(struct bcm2835_host *host)
{
struct mmc_data *data;
BUG_ON(!host->data);
data = host->data;
host->data = NULL;
if (data->error)
data->bytes_xfered = 0;
else
data->bytes_xfered = data->blksz * data->blocks;
/*
* Need to send CMD12 if -
* a) open-ended multiblock transfer (no CMD23)
* b) error in multiblock transfer
*/
if (data->stop &&
(data->error ||
!host->mrq->sbc)) {
/*
* The controller needs a reset of internal state machines
* upon error conditions.
*/
if (data->error) {
bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
}
bcm2835_mmc_send_command(host, data->stop);
} else
tasklet_schedule(&host->finish_tasklet);
}
static void bcm2835_mmc_finish_command(struct bcm2835_host *host)
{
int i;
BUG_ON(host->cmd == NULL);
if (host->cmd->flags & MMC_RSP_PRESENT) {
if (host->cmd->flags & MMC_RSP_136) {
/* CRC is stripped so we need to do some shifting. */
for (i = 0; i < 4; i++) {
host->cmd->resp[i] = bcm2835_mmc_readl(host,
SDHCI_RESPONSE + (3-i)*4) << 8;
if (i != 3)
host->cmd->resp[i] |=
bcm2835_mmc_readb(host,
SDHCI_RESPONSE + (3-i)*4-1);
}
} else {
host->cmd->resp[0] = bcm2835_mmc_readl(host, SDHCI_RESPONSE);
}
}
host->cmd->error = 0;
/* Finished CMD23, now send actual command. */
if (host->cmd == host->mrq->sbc) {
host->cmd = NULL;
bcm2835_mmc_send_command(host, host->mrq->cmd);
if (host->mrq->cmd->data && host->use_dma) {
/* DMA transfer starts now, PIO starts after interrupt */
bcm2835_mmc_transfer_dma(host);
}
} else {
/* Processed actual command. */
if (host->data && host->data_early)
bcm2835_mmc_finish_data(host);
if (!host->cmd->data)
tasklet_schedule(&host->finish_tasklet);
host->cmd = NULL;
}
}
static void bcm2835_mmc_timeout_timer(unsigned long data)
{
struct bcm2835_host *host;
unsigned long flags;
host = (struct bcm2835_host *)data;
spin_lock_irqsave(&host->lock, flags);
if (host->mrq) {
pr_err("%s: Timeout waiting for hardware interrupt.\n",
mmc_hostname(host->mmc));
bcm2835_mmc_dumpregs(host);
if (host->data) {
host->data->error = -ETIMEDOUT;
bcm2835_mmc_finish_data(host);
} else {
if (host->cmd)
host->cmd->error = -ETIMEDOUT;
else
host->mrq->cmd->error = -ETIMEDOUT;
tasklet_schedule(&host->finish_tasklet);
}
}
mmiowb();
spin_unlock_irqrestore(&host->lock, flags);
}
static void bcm2835_mmc_enable_sdio_irq_nolock(struct bcm2835_host *host, int enable)
{
if (!(host->flags & SDHCI_DEVICE_DEAD)) {
if (enable)
host->ier |= SDHCI_INT_CARD_INT;
else
host->ier &= ~SDHCI_INT_CARD_INT;
bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 7);
bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 7);
mmiowb();
}
}
static void bcm2835_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
{
struct bcm2835_host *host = mmc_priv(mmc);
unsigned long flags;
spin_lock_irqsave(&host->lock, flags);
if (enable)
host->flags |= SDHCI_SDIO_IRQ_ENABLED;
else
host->flags &= ~SDHCI_SDIO_IRQ_ENABLED;
bcm2835_mmc_enable_sdio_irq_nolock(host, enable);
spin_unlock_irqrestore(&host->lock, flags);
}
static void bcm2835_mmc_cmd_irq(struct bcm2835_host *host, u32 intmask)
{
BUG_ON(intmask == 0);
if (!host->cmd) {
pr_err("%s: Got command interrupt 0x%08x even "
"though no command operation was in progress.\n",
mmc_hostname(host->mmc), (unsigned)intmask);
bcm2835_mmc_dumpregs(host);
return;
}
if (intmask & SDHCI_INT_TIMEOUT)
host->cmd->error = -ETIMEDOUT;
else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
SDHCI_INT_INDEX)) {
host->cmd->error = -EILSEQ;
}
if (host->cmd->error) {
tasklet_schedule(&host->finish_tasklet);
return;
}
if (intmask & SDHCI_INT_RESPONSE)
bcm2835_mmc_finish_command(host);
}
static void bcm2835_mmc_data_irq(struct bcm2835_host *host, u32 intmask)
{
struct dma_chan *dma_chan;
u32 dir_data;
BUG_ON(intmask == 0);
if (!host->data) {
/*
* The "data complete" interrupt is also used to
* indicate that a busy state has ended. See comment
* above in sdhci_cmd_irq().
*/
if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
if (intmask & SDHCI_INT_DATA_END) {
bcm2835_mmc_finish_command(host);
return;
}
}
pr_debug("%s: Got data interrupt 0x%08x even "
"though no data operation was in progress.\n",
mmc_hostname(host->mmc), (unsigned)intmask);
bcm2835_mmc_dumpregs(host);
return;
}
if (intmask & SDHCI_INT_DATA_TIMEOUT)
host->data->error = -ETIMEDOUT;
else if (intmask & SDHCI_INT_DATA_END_BIT)
host->data->error = -EILSEQ;
else if ((intmask & SDHCI_INT_DATA_CRC) &&
SDHCI_GET_CMD(bcm2835_mmc_readw(host, SDHCI_COMMAND))
!= MMC_BUS_TEST_R)
host->data->error = -EILSEQ;
if (host->use_dma) {
if (host->data->flags & MMC_DATA_WRITE) {
/* IRQ handled here */
dma_chan = host->dma_chan_tx;
dir_data = DMA_TO_DEVICE;
dma_unmap_sg(dma_chan->device->dev,
host->data->sg, host->data->sg_len,
dir_data);
bcm2835_mmc_finish_data(host);
}
} else {
if (host->data->error)
bcm2835_mmc_finish_data(host);
else {
if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
bcm2835_mmc_transfer_pio(host);
if (intmask & SDHCI_INT_DATA_END) {
if (host->cmd) {
/*
* Data managed to finish before the
* command completed. Make sure we do
* things in the proper order.
*/
host->data_early = 1;
} else {
bcm2835_mmc_finish_data(host);
}
}
}
}
}
static irqreturn_t bcm2835_mmc_irq(int irq, void *dev_id)
{
irqreturn_t result = IRQ_NONE;
struct bcm2835_host *host = dev_id;
u32 intmask, mask, unexpected = 0;
int max_loops = 16;
#ifndef CONFIG_ARCH_BCM2835
int cardint = 0;
#endif
spin_lock(&host->lock);
intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
if (!intmask || intmask == 0xffffffff) {
result = IRQ_NONE;
goto out;
}
do {