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ov5647.c
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ov5647.c
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/*
* A V4L2 driver for OmniVision OV5647 cameras.
*
* Based on Samsung S5K6AAFX SXGA 1/6" 1.3M CMOS Image Sensor driver
* Copyright (C) 2011 Sylwester Nawrocki <s.nawrocki@samsung.com>
*
* Based on Omnivision OV7670 Camera Driver
* Copyright (C) 2006-7 Jonathan Corbet <corbet@lwn.net>
*
* Copyright (C) 2016, Synopsys, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed .as is. WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_graph.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/videodev2.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-event.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-image-sizes.h>
#include <media/v4l2-mediabus.h>
#define SENSOR_NAME "ov5647"
/*
* From the datasheet, "20ms after PWDN goes low or 20ms after RESETB goes
* high if reset is inserted after PWDN goes high, host can access sensor's
* SCCB to initialize sensor."
*/
#define PWDN_ACTIVE_DELAY_MS 20
#define MIPI_CTRL00_CLOCK_LANE_GATE BIT(5)
#define MIPI_CTRL00_LINE_SYNC_ENABLE BIT(4)
#define MIPI_CTRL00_BUS_IDLE BIT(2)
#define MIPI_CTRL00_CLOCK_LANE_DISABLE BIT(0)
#define OV5647_SW_STANDBY 0x0100
#define OV5647_SW_RESET 0x0103
#define OV5647_REG_CHIPID_H 0x300A
#define OV5647_REG_CHIPID_L 0x300B
#define OV5640_REG_PAD_OUT 0x300D
#define OV5647_REG_EXP_HI 0x3500
#define OV5647_REG_EXP_MID 0x3501
#define OV5647_REG_EXP_LO 0x3502
#define OV5647_REG_AEC_AGC 0x3503
#define OV5647_REG_GAIN_HI 0x350A
#define OV5647_REG_GAIN_LO 0x350B
#define OV5647_REG_VTS_HI 0x380e
#define OV5647_REG_VTS_LO 0x380f
#define OV5647_REG_VFLIP 0x3820
#define OV5647_REG_HFLIP 0x3821
#define OV5647_REG_FRAME_OFF_NUMBER 0x4202
#define OV5647_REG_MIPI_CTRL00 0x4800
#define OV5647_REG_MIPI_CTRL14 0x4814
#define OV5647_REG_AWB 0x5001
#define REG_TERM 0xfffe
#define VAL_TERM 0xfe
#define REG_DLY 0xffff
/* OV5647 native and active pixel array size */
#define OV5647_NATIVE_WIDTH 2624U
#define OV5647_NATIVE_HEIGHT 1956U
#define OV5647_PIXEL_ARRAY_LEFT 16U
#define OV5647_PIXEL_ARRAY_TOP 6U
#define OV5647_PIXEL_ARRAY_WIDTH 2592U
#define OV5647_PIXEL_ARRAY_HEIGHT 1944U
#define OV5647_VBLANK_MIN 24
#define OV5647_VTS_MAX 32767
#define OV5647_EXPOSURE_MIN 4
#define OV5647_EXPOSURE_STEP 1
#define OV5647_EXPOSURE_DEFAULT 1000
#define OV5647_EXPOSURE_MAX 65535
/* regulator supplies */
static const char * const ov5647_supply_names[] = {
"avdd", /* Analog power */
"dovdd", /* Digital I/O power */
"dvdd", /* Digital core power */
};
#define OV5647_NUM_SUPPLIES ARRAY_SIZE(ov5647_supply_names)
struct regval_list {
u16 addr;
u8 data;
};
struct ov5647_mode {
struct v4l2_mbus_framefmt format;
/* Analog crop rectangle. */
struct v4l2_rect crop;
u64 pixel_rate;
/* HTS as defined in the register set (0x380C/0x380D) */
int hts;
/* Default VTS value for this mode */
int vts_def;
struct regval_list *reg_list;
unsigned int num_regs;
};
struct ov5647 {
struct v4l2_subdev sd;
struct media_pad pad;
struct mutex lock;
const struct ov5647_mode *mode;
int power_count;
struct clk *xclk;
struct gpio_desc *pwdn;
struct regulator_bulk_data supplies[OV5647_NUM_SUPPLIES];
unsigned int flags;
struct v4l2_ctrl_handler ctrls;
struct v4l2_ctrl *pixel_rate;
struct v4l2_ctrl *hblank;
struct v4l2_ctrl *vblank;
struct v4l2_ctrl *exposure;
struct v4l2_ctrl *hflip;
struct v4l2_ctrl *vflip;
bool write_mode_regs;
};
static inline struct ov5647 *to_state(struct v4l2_subdev *sd)
{
return container_of(sd, struct ov5647, sd);
}
static struct regval_list sensor_oe_disable_regs[] = {
{0x3000, 0x00},
{0x3001, 0x00},
{0x3002, 0x00},
};
static struct regval_list sensor_oe_enable_regs[] = {
{0x3000, 0x0f},
{0x3001, 0xff},
{0x3002, 0xe4},
};
static struct regval_list ov5647_640x480_8bit[] = {
{0x0100, 0x00},
{0x0103, 0x01},
{0x3034, 0x08},
{0x3035, 0x21},
{0x3036, 0x46},
{0x303c, 0x11},
{0x3106, 0xf5},
{0x3821, 0x01},
{0x3820, 0x41},
{0x3827, 0xec},
{0x370c, 0x0f},
{0x3612, 0x59},
{0x3618, 0x00},
{0x5000, 0x06},
{0x5002, 0x41},
{0x5003, 0x08},
{0x5a00, 0x08},
{0x3000, 0x00},
{0x3001, 0x00},
{0x3002, 0x00},
{0x3016, 0x08},
{0x3017, 0xe0},
{0x3018, 0x44},
{0x301c, 0xf8},
{0x301d, 0xf0},
{0x3a18, 0x00},
{0x3a19, 0xf8},
{0x3c01, 0x80},
{0x3b07, 0x0c},
{0x380c, 0x07},
{0x380d, 0x68},
{0x3814, 0x31},
{0x3815, 0x31},
{0x3708, 0x64},
{0x3709, 0x52},
{0x3808, 0x02},
{0x3809, 0x80},
{0x380a, 0x01},
{0x380b, 0xE0},
{0x3801, 0x00},
{0x3802, 0x00},
{0x3803, 0x00},
{0x3804, 0x0a},
{0x3805, 0x3f},
{0x3806, 0x07},
{0x3807, 0xa1},
{0x3811, 0x08},
{0x3813, 0x02},
{0x3630, 0x2e},
{0x3632, 0xe2},
{0x3633, 0x23},
{0x3634, 0x44},
{0x3636, 0x06},
{0x3620, 0x64},
{0x3621, 0xe0},
{0x3600, 0x37},
{0x3704, 0xa0},
{0x3703, 0x5a},
{0x3715, 0x78},
{0x3717, 0x01},
{0x3731, 0x02},
{0x370b, 0x60},
{0x3705, 0x1a},
{0x3f05, 0x02},
{0x3f06, 0x10},
{0x3f01, 0x0a},
{0x3a08, 0x01},
{0x3a09, 0x27},
{0x3a0a, 0x00},
{0x3a0b, 0xf6},
{0x3a0d, 0x04},
{0x3a0e, 0x03},
{0x3a0f, 0x58},
{0x3a10, 0x50},
{0x3a1b, 0x58},
{0x3a1e, 0x50},
{0x3a11, 0x60},
{0x3a1f, 0x28},
{0x4001, 0x02},
{0x4004, 0x02},
{0x4000, 0x09},
{0x4837, 0x24},
{0x4050, 0x6e},
{0x4051, 0x8f},
{0x0100, 0x01},
};
static struct regval_list ov5647_2592x1944_10bit[] = {
{0x0100, 0x00},
{0x0103, 0x01},
{0x3034, 0x1a},
{0x3035, 0x21},
{0x3036, 0x69},
{0x303c, 0x11},
{0x3106, 0xf5},
{0x3821, 0x00},
{0x3820, 0x00},
{0x3827, 0xec},
{0x370c, 0x03},
{0x3612, 0x5b},
{0x3618, 0x04},
{0x5000, 0x06},
{0x5002, 0x41},
{0x5003, 0x08},
{0x5a00, 0x08},
{0x3000, 0x00},
{0x3001, 0x00},
{0x3002, 0x00},
{0x3016, 0x08},
{0x3017, 0xe0},
{0x3018, 0x44},
{0x301c, 0xf8},
{0x301d, 0xf0},
{0x3a18, 0x00},
{0x3a19, 0xf8},
{0x3c01, 0x80},
{0x3b07, 0x0c},
{0x380c, 0x0b},
{0x380d, 0x1c},
{0x3814, 0x11},
{0x3815, 0x11},
{0x3708, 0x64},
{0x3709, 0x12},
{0x3808, 0x0a},
{0x3809, 0x20},
{0x380a, 0x07},
{0x380b, 0x98},
{0x3800, 0x00},
{0x3801, 0x00},
{0x3802, 0x00},
{0x3803, 0x00},
{0x3804, 0x0a},
{0x3805, 0x3f},
{0x3806, 0x07},
{0x3807, 0xa3},
{0x3811, 0x10},
{0x3813, 0x06},
{0x3630, 0x2e},
{0x3632, 0xe2},
{0x3633, 0x23},
{0x3634, 0x44},
{0x3636, 0x06},
{0x3620, 0x64},
{0x3621, 0xe0},
{0x3600, 0x37},
{0x3704, 0xa0},
{0x3703, 0x5a},
{0x3715, 0x78},
{0x3717, 0x01},
{0x3731, 0x02},
{0x370b, 0x60},
{0x3705, 0x1a},
{0x3f05, 0x02},
{0x3f06, 0x10},
{0x3f01, 0x0a},
{0x3a08, 0x01},
{0x3a09, 0x28},
{0x3a0a, 0x00},
{0x3a0b, 0xf6},
{0x3a0d, 0x08},
{0x3a0e, 0x06},
{0x3a0f, 0x58},
{0x3a10, 0x50},
{0x3a1b, 0x58},
{0x3a1e, 0x50},
{0x3a11, 0x60},
{0x3a1f, 0x28},
{0x4001, 0x02},
{0x4004, 0x04},
{0x4000, 0x09},
{0x4837, 0x19},
{0x4800, 0x24},
{0x3503, 0x03},
{0x0100, 0x01},
};
static struct regval_list ov5647_1080p30_10bit[] = {
{0x0100, 0x00},
{0x0103, 0x01},
{0x3034, 0x1a},
{0x3035, 0x21},
{0x3036, 0x62},
{0x303c, 0x11},
{0x3106, 0xf5},
{0x3821, 0x00},
{0x3820, 0x00},
{0x3827, 0xec},
{0x370c, 0x03},
{0x3612, 0x5b},
{0x3618, 0x04},
{0x5000, 0x06},
{0x5002, 0x41},
{0x5003, 0x08},
{0x5a00, 0x08},
{0x3000, 0x00},
{0x3001, 0x00},
{0x3002, 0x00},
{0x3016, 0x08},
{0x3017, 0xe0},
{0x3018, 0x44},
{0x301c, 0xf8},
{0x301d, 0xf0},
{0x3a18, 0x00},
{0x3a19, 0xf8},
{0x3c01, 0x80},
{0x3b07, 0x0c},
{0x380c, 0x09},
{0x380d, 0x70},
{0x3814, 0x11},
{0x3815, 0x11},
{0x3708, 0x64},
{0x3709, 0x12},
{0x3808, 0x07},
{0x3809, 0x80},
{0x380a, 0x04},
{0x380b, 0x38},
{0x3800, 0x01},
{0x3801, 0x5c},
{0x3802, 0x01},
{0x3803, 0xb2},
{0x3804, 0x08},
{0x3805, 0xe3},
{0x3806, 0x05},
{0x3807, 0xf1},
{0x3811, 0x04},
{0x3813, 0x02},
{0x3630, 0x2e},
{0x3632, 0xe2},
{0x3633, 0x23},
{0x3634, 0x44},
{0x3636, 0x06},
{0x3620, 0x64},
{0x3621, 0xe0},
{0x3600, 0x37},
{0x3704, 0xa0},
{0x3703, 0x5a},
{0x3715, 0x78},
{0x3717, 0x01},
{0x3731, 0x02},
{0x370b, 0x60},
{0x3705, 0x1a},
{0x3f05, 0x02},
{0x3f06, 0x10},
{0x3f01, 0x0a},
{0x3a08, 0x01},
{0x3a09, 0x4b},
{0x3a0a, 0x01},
{0x3a0b, 0x13},
{0x3a0d, 0x04},
{0x3a0e, 0x03},
{0x3a0f, 0x58},
{0x3a10, 0x50},
{0x3a1b, 0x58},
{0x3a1e, 0x50},
{0x3a11, 0x60},
{0x3a1f, 0x28},
{0x4001, 0x02},
{0x4004, 0x04},
{0x4000, 0x09},
{0x4837, 0x19},
{0x4800, 0x34},
{0x3503, 0x03},
{0x0100, 0x01},
};
static struct regval_list ov5647_2x2binned_10bit[] = {
{0x0100, 0x00},
{0x0103, 0x01},
{0x3034, 0x1A},
{0x3035, 0x21},
{0x3036, 0x62},
{0x303C, 0x11},
{0x3106, 0xF5},
{0x3827, 0xEC},
{0x370C, 0x03},
{0x3612, 0x59},
{0x3618, 0x00},
{0x5000, 0x06},
{0x5002, 0x41},
{0x5003, 0x08},
{0x5A00, 0x08},
{0x3000, 0x00},
{0x3001, 0x00},
{0x3002, 0x00},
{0x3016, 0x08},
{0x3017, 0xE0},
{0x3018, 0x44},
{0x301C, 0xF8},
{0x301D, 0xF0},
{0x3A18, 0x00},
{0x3A19, 0xF8},
{0x3C01, 0x80},
{0x3B07, 0x0C},
{0x3800, 0x00},
{0x3801, 0x00},
{0x3802, 0x00},
{0x3803, 0x00},
{0x3804, 0x0A},
{0x3805, 0x3F},
{0x3806, 0x07},
{0x3807, 0xA3},
{0x3808, 0x05},
{0x3809, 0x10},
{0x380A, 0x03},
{0x380B, 0xCC},
{0x380C, 0x07},
{0x380D, 0x68},
{0x3811, 0x0c},
{0x3813, 0x06},
{0x3814, 0x31},
{0x3815, 0x31},
{0x3630, 0x2E},
{0x3632, 0xE2},
{0x3633, 0x23},
{0x3634, 0x44},
{0x3636, 0x06},
{0x3620, 0x64},
{0x3621, 0xE0},
{0x3600, 0x37},
{0x3704, 0xA0},
{0x3703, 0x5A},
{0x3715, 0x78},
{0x3717, 0x01},
{0x3731, 0x02},
{0x370B, 0x60},
{0x3705, 0x1A},
{0x3F05, 0x02},
{0x3F06, 0x10},
{0x3F01, 0x0A},
{0x3A08, 0x01},
{0x3A09, 0x28},
{0x3A0A, 0x00},
{0x3A0B, 0xF6},
{0x3A0D, 0x08},
{0x3A0E, 0x06},
{0x3A0F, 0x58},
{0x3A10, 0x50},
{0x3A1B, 0x58},
{0x3A1E, 0x50},
{0x3A11, 0x60},
{0x3A1F, 0x28},
{0x4001, 0x02},
{0x4004, 0x04},
{0x4000, 0x09},
{0x4837, 0x16},
{0x4800, 0x24},
{0x3503, 0x03},
{0x3820, 0x41},
{0x3821, 0x01},
{0x350A, 0x00},
{0x350B, 0x10},
{0x3500, 0x00},
{0x3501, 0x1A},
{0x3502, 0xF0},
{0x3212, 0xA0},
{0x0100, 0x01},
};
static struct regval_list ov5647_640x480_10bit[] = {
{0x0100, 0x00},
{0x0103, 0x01},
{0x3035, 0x11},
{0x3036, 0x46},
{0x303c, 0x11},
{0x3821, 0x01},
{0x3820, 0x41},
{0x370c, 0x03},
{0x3612, 0x59},
{0x3618, 0x00},
{0x5000, 0x06},
{0x5003, 0x08},
{0x5a00, 0x08},
{0x3000, 0xff},
{0x3001, 0xff},
{0x3002, 0xff},
{0x301d, 0xf0},
{0x3a18, 0x00},
{0x3a19, 0xf8},
{0x3c01, 0x80},
{0x3b07, 0x0c},
{0x380c, 0x07},
{0x380d, 0x3c},
{0x3814, 0x35},
{0x3815, 0x35},
{0x3708, 0x64},
{0x3709, 0x52},
{0x3808, 0x02},
{0x3809, 0x80},
{0x380a, 0x01},
{0x380b, 0xe0},
{0x3800, 0x00},
{0x3801, 0x10},
{0x3802, 0x00},
{0x3803, 0x00},
{0x3804, 0x0a},
{0x3805, 0x2f},
{0x3806, 0x07},
{0x3807, 0x9f},
{0x3630, 0x2e},
{0x3632, 0xe2},
{0x3633, 0x23},
{0x3634, 0x44},
{0x3620, 0x64},
{0x3621, 0xe0},
{0x3600, 0x37},
{0x3704, 0xa0},
{0x3703, 0x5a},
{0x3715, 0x78},
{0x3717, 0x01},
{0x3731, 0x02},
{0x370b, 0x60},
{0x3705, 0x1a},
{0x3f05, 0x02},
{0x3f06, 0x10},
{0x3f01, 0x0a},
{0x3a08, 0x01},
{0x3a09, 0x2e},
{0x3a0a, 0x00},
{0x3a0b, 0xfb},
{0x3a0d, 0x02},
{0x3a0e, 0x01},
{0x3a0f, 0x58},
{0x3a10, 0x50},
{0x3a1b, 0x58},
{0x3a1e, 0x50},
{0x3a11, 0x60},
{0x3a1f, 0x28},
{0x4001, 0x02},
{0x4004, 0x02},
{0x4000, 0x09},
{0x3000, 0x00},
{0x3001, 0x00},
{0x3002, 0x00},
{0x3017, 0xe0},
{0x301c, 0xfc},
{0x3636, 0x06},
{0x3016, 0x08},
{0x3827, 0xec},
{0x3018, 0x44},
{0x3035, 0x21},
{0x3106, 0xf5},
{0x3034, 0x1a},
{0x301c, 0xf8},
{0x4800, 0x34},
{0x3503, 0x03},
{0x0100, 0x01},
};
static struct ov5647_mode supported_modes_8bit[] = {
/*
* MODE 0: Original 8-bit VGA mode.
* Uncentred crop (top left quarter) from 2x2 binned 1296x972 image.
*/
{
.format = {
.code = MEDIA_BUS_FMT_SBGGR8_1X8,
.colorspace = V4L2_COLORSPACE_RAW,
.field = V4L2_FIELD_NONE,
.width = 640,
.height = 480
},
.crop = {
.left = OV5647_PIXEL_ARRAY_LEFT,
.top = OV5647_PIXEL_ARRAY_TOP,
.width = 1280,
.height = 960,
},
.pixel_rate = 77291670,
.hts = 1896,
.vts_def = 0x3d8,
.reg_list = ov5647_640x480_8bit,
.num_regs = ARRAY_SIZE(ov5647_640x480_8bit)
},
};
static struct ov5647_mode supported_modes_10bit[] = {
/*
* MODE 0: 2592x1944 full resolution full FOV 10-bit mode.
*/
{
.format = {
.code = MEDIA_BUS_FMT_SBGGR10_1X10,
.colorspace = V4L2_COLORSPACE_RAW,
.field = V4L2_FIELD_NONE,
.width = 2592,
.height = 1944
},
.crop = {
.left = OV5647_PIXEL_ARRAY_LEFT,
.top = OV5647_PIXEL_ARRAY_TOP,
.width = 2592,
.height = 1944
},
.pixel_rate = 87500000,
.hts = 2844,
.vts_def = 0x7b0,
.reg_list = ov5647_2592x1944_10bit,
.num_regs = ARRAY_SIZE(ov5647_2592x1944_10bit)
},
/*
* MODE 1: 1080p30 10-bit mode.
* Full resolution centre-cropped down to 1080p.
*/
{
.format = {
.code = MEDIA_BUS_FMT_SBGGR10_1X10,
.colorspace = V4L2_COLORSPACE_RAW,
.field = V4L2_FIELD_NONE,
.width = 1920,
.height = 1080
},
.crop = {
.left = 364,
.top = 450,
.width = 1928,
.height = 1080,
},
.pixel_rate = 81666700,
.hts = 2416,
.vts_def = 0x450,
.reg_list = ov5647_1080p30_10bit,
.num_regs = ARRAY_SIZE(ov5647_1080p30_10bit)
},
/*
* MODE 2: 2x2 binned full FOV 10-bit mode.
*/
{
.format = {
.code = MEDIA_BUS_FMT_SBGGR10_1X10,
.colorspace = V4L2_COLORSPACE_RAW,
.field = V4L2_FIELD_NONE,
.width = 1296,
.height = 972
},
.crop = {
.left = OV5647_PIXEL_ARRAY_LEFT,
.top = OV5647_PIXEL_ARRAY_TOP,
.width = 2592,
.height = 1944,
},
.pixel_rate = 81666700,
.hts = 1896,
.vts_def = 0x59b,
.reg_list = ov5647_2x2binned_10bit,
.num_regs = ARRAY_SIZE(ov5647_2x2binned_10bit)
},
/*
* MODE 3: 10-bit VGA full FOV mode 60fps.
* 2x2 binned and subsampled down to VGA.
*/
{
.format = {
.code = MEDIA_BUS_FMT_SBGGR10_1X10,
.colorspace = V4L2_COLORSPACE_RAW,
.field = V4L2_FIELD_NONE,
.width = 640,
.height = 480
},
.crop = {
.left = OV5647_PIXEL_ARRAY_LEFT,
.top = OV5647_PIXEL_ARRAY_TOP,
.width = 2560,
.height = 1920,
},
.pixel_rate = 55000000,
.hts = 1852,
.vts_def = 0x1f8,
.reg_list = ov5647_640x480_10bit,
.num_regs = ARRAY_SIZE(ov5647_640x480_10bit)
},
};
/* Use 2x2 binned 10-bit mode as default. */
#define OV5647_DEFAULT_MODE (&supported_modes_10bit[2])
static int ov5647_write16(struct v4l2_subdev *sd, u16 reg, u16 val)
{
int ret;
unsigned char data[4] = { reg >> 8, reg & 0xff, val >> 8, val & 0xff};
struct i2c_client *client = v4l2_get_subdevdata(sd);
ret = i2c_master_send(client, data, 4);
/*
* Writing the wrong number of bytes also needs to be flagged as an
* error. Success needs to produce a 0 return code.
*/
if (ret == 4) {
ret = 0;
} else {
dev_dbg(&client->dev, "%s: i2c write error, reg: %x\n",
__func__, reg);
if (ret >= 0)
ret = -EINVAL;
}
return ret;
}
static int ov5647_write(struct v4l2_subdev *sd, u16 reg, u8 val)
{
int ret;
unsigned char data[3] = { reg >> 8, reg & 0xff, val};
struct i2c_client *client = v4l2_get_subdevdata(sd);
ret = i2c_master_send(client, data, 3);
/*
* Writing the wrong number of bytes also needs to be flagged as an
* error. Success needs to produce a 0 return code.
*/
if (ret == 3) {
ret = 0;
} else {
dev_dbg(&client->dev, "%s: i2c write error, reg: %x\n",
__func__, reg);
if (ret >= 0)
ret = -EINVAL;
}
return ret;
}
static int ov5647_read(struct v4l2_subdev *sd, u16 reg, u8 *val)
{
int ret;
unsigned char data_w[2] = { reg >> 8, reg & 0xff };
struct i2c_client *client = v4l2_get_subdevdata(sd);
ret = i2c_master_send(client, data_w, 2);
/*
* A negative return code, or sending the wrong number of bytes, both
* count as an error.
*/
if (ret != 2) {
dev_dbg(&client->dev, "%s: i2c write error, reg: %x\n",
__func__, reg);
if (ret >= 0)
ret = -EINVAL;
return ret;
}
ret = i2c_master_recv(client, val, 1);
/*
* The only return value indicating success is 1. Anything else, even
* a non-negative value, indicates something went wrong.
*/
if (ret == 1) {
ret = 0;
} else {
dev_dbg(&client->dev, "%s: i2c read error, reg: %x\n",
__func__, reg);
if (ret >= 0)
ret = -EINVAL;
}
return ret;
}
static int ov5647_write_array(struct v4l2_subdev *sd,
struct regval_list *regs, int array_size)
{
int i, ret;
for (i = 0; i < array_size; i++) {
ret = ov5647_write(sd, regs[i].addr, regs[i].data);
if (ret < 0)
return ret;
}
return 0;
}
static int ov5647_set_virtual_channel(struct v4l2_subdev *sd, int channel)
{
u8 channel_id;
int ret;
ret = ov5647_read(sd, OV5647_REG_MIPI_CTRL14, &channel_id);
if (ret < 0)
return ret;
channel_id &= ~(3 << 6);
return ov5647_write(sd, OV5647_REG_MIPI_CTRL14, channel_id | (channel << 6));
}
static int __sensor_init(struct v4l2_subdev *sd)
{
int ret;
u8 resetval, rdval;
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov5647 *state = to_state(sd);
ret = ov5647_read(sd, OV5647_SW_STANDBY, &rdval);
if (ret < 0)
return ret;
if (state->write_mode_regs) {
ret = ov5647_write_array(sd, state->mode->reg_list,
state->mode->num_regs);
if (ret < 0) {
dev_err(&client->dev, "write sensor default regs error\n");
return ret;
}
state->write_mode_regs = false;
}
ret = ov5647_set_virtual_channel(sd, 0);
if (ret < 0)
return ret;
ret = ov5647_read(sd, OV5647_SW_STANDBY, &resetval);
if (ret < 0)
return ret;
if (!(resetval & 0x01)) {
dev_err(&client->dev, "Device was in SW standby");
ret = ov5647_write(sd, OV5647_SW_STANDBY, 0x01);
if (ret < 0)
return ret;
}
return 0;
}
static int ov5647_stream_on(struct v4l2_subdev *sd)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov5647 *ov5647 = to_state(sd);
u8 val = MIPI_CTRL00_BUS_IDLE;
int ret;
ret = __sensor_init(sd);
if (ret < 0) {
dev_err(&client->dev, "sensor_init failed\n");
return ret;
}
/* Apply customized values from user when stream starts */
ret = __v4l2_ctrl_handler_setup(sd->ctrl_handler);
if (ret)
return ret;
if (ov5647->flags & V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK)
val |= MIPI_CTRL00_CLOCK_LANE_GATE |
MIPI_CTRL00_LINE_SYNC_ENABLE;
ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, val);
if (ret < 0)
return ret;
ret = ov5647_write(sd, OV5647_REG_FRAME_OFF_NUMBER, 0x00);
if (ret < 0)
return ret;
return ov5647_write(sd, OV5640_REG_PAD_OUT, 0x00);
}
static int ov5647_stream_off(struct v4l2_subdev *sd)
{
int ret;
ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, MIPI_CTRL00_CLOCK_LANE_GATE
| MIPI_CTRL00_BUS_IDLE | MIPI_CTRL00_CLOCK_LANE_DISABLE);
if (ret < 0)
return ret;
ret = ov5647_write(sd, OV5647_REG_FRAME_OFF_NUMBER, 0x0f);
if (ret < 0)
return ret;
return ov5647_write(sd, OV5640_REG_PAD_OUT, 0x01);
}
static int set_sw_standby(struct v4l2_subdev *sd, bool standby)
{
int ret;
u8 rdval;
ret = ov5647_read(sd, OV5647_SW_STANDBY, &rdval);
if (ret < 0)
return ret;
if (standby)
rdval &= ~0x01;
else
rdval |= 0x01;
return ov5647_write(sd, OV5647_SW_STANDBY, rdval);
}
static int ov5647_sensor_power(struct v4l2_subdev *sd, int on)
{
int ret = 0;
struct ov5647 *ov5647 = to_state(sd);
struct i2c_client *client = v4l2_get_subdevdata(sd);
mutex_lock(&ov5647->lock);
if (on && !ov5647->power_count) {
dev_dbg(&client->dev, "OV5647 power on\n");
ret = regulator_bulk_enable(OV5647_NUM_SUPPLIES,
ov5647->supplies);
if (ret < 0) {
dev_err(&client->dev, "Failed to enable regulators\n");
goto out;
}
if (ov5647->pwdn) {
gpiod_set_value_cansleep(ov5647->pwdn, 0);
msleep(PWDN_ACTIVE_DELAY_MS);
}
ret = clk_prepare_enable(ov5647->xclk);
if (ret < 0) {
regulator_bulk_disable(OV5647_NUM_SUPPLIES,
ov5647->supplies);
dev_err(&client->dev, "clk prepare enable failed\n");
goto out;
}
ret = ov5647_write_array(sd, sensor_oe_enable_regs,
ARRAY_SIZE(sensor_oe_enable_regs));
if (ret < 0) {
clk_disable_unprepare(ov5647->xclk);
regulator_bulk_disable(OV5647_NUM_SUPPLIES,
ov5647->supplies);
dev_err(&client->dev,
"write sensor_oe_enable_regs error\n");
goto out;
}
/*
* Ensure streaming off to make clock lane go into LP-11 state.
*/
ret = ov5647_stream_off(sd);
if (ret < 0) {
clk_disable_unprepare(ov5647->xclk);
regulator_bulk_disable(OV5647_NUM_SUPPLIES,