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PCI-Express Non-Transparent Bridge Support
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A PCI-Express non-transparent bridge (NTB) is a point-to-point PCIe bus
connecting 2 systems, providing electrical isolation between the two subsystems.
A non-transparent bridge is functionally similar to a transparent bridge except
that both sides of the bridge have their own independent address domains.  The
host on one side of the bridge will not have the visibility of the complete
memory or I/O space on the other side of the bridge.  To communicate across the
non-transparent bridge, each NTB endpoint has one (or more) apertures exposed to
the local system.  Writes to these apertures are mirrored to memory on the
remote system.  Communications can also occur through the use of doorbell
registers that initiate interrupts to the alternate domain, and scratch-pad
registers accessible from both sides.

The NTB device driver is needed to configure these memory windows, doorbell, and
scratch-pad registers as well as use them in such a way as they can be turned
into a viable communication channel to the remote system.  ntb_hw.[ch]
determines the usage model (NTB to NTB or NTB to Root Port) and abstracts away
the underlying hardware to provide access and a common interface to the doorbell
registers, scratch pads, and memory windows.  These hardware interfaces are
exported so that other, non-mainlined kernel drivers can access these.
ntb_transport.[ch] also uses the exported interfaces in ntb_hw.[ch] to setup a
communication channel(s) and provide a reliable way of transferring data from
one side to the other, which it then exports so that "client" drivers can access
them.  These client drivers are used to provide a standard kernel interface
(i.e., Ethernet device) to NTB, such that Linux can transfer data from one
system to the other in a standard way.

Signed-off-by: Jon Mason <jon.mason@intel.com>
Reviewed-by: Nicholas Bellinger <nab@linux-iscsi.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Jon Mason authored and gregkh committed Jan 18, 2013
1 parent ea8a83a commit fce8a7b
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6 changes: 6 additions & 0 deletions MAINTAINERS
Expand Up @@ -5394,6 +5394,12 @@ S: Maintained
F: Documentation/scsi/NinjaSCSI.txt
F: drivers/scsi/nsp32*

NTB DRIVER
M: Jon Mason <jon.mason@intel.com>
S: Supported
F: drivers/ntb/
F: include/linux/ntb.h

NTFS FILESYSTEM
M: Anton Altaparmakov <anton@tuxera.com>
L: linux-ntfs-dev@lists.sourceforge.net
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2 changes: 2 additions & 0 deletions drivers/Kconfig
Expand Up @@ -150,6 +150,8 @@ source "drivers/memory/Kconfig"

source "drivers/iio/Kconfig"

source "drivers/ntb/Kconfig"

source "drivers/vme/Kconfig"

source "drivers/pwm/Kconfig"
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1 change: 1 addition & 0 deletions drivers/Makefile
Expand Up @@ -146,3 +146,4 @@ obj-$(CONFIG_MEMORY) += memory/
obj-$(CONFIG_IIO) += iio/
obj-$(CONFIG_VME_BUS) += vme/
obj-$(CONFIG_IPACK_BUS) += ipack/
obj-$(CONFIG_NTB) += ntb/
13 changes: 13 additions & 0 deletions drivers/ntb/Kconfig
@@ -0,0 +1,13 @@
config NTB
tristate "Intel Non-Transparent Bridge support"
depends on PCI
depends on X86
help
The PCI-E Non-transparent bridge hardware is a point-to-point PCI-E bus
connecting 2 systems. When configured, writes to the device's PCI
mapped memory will be mirrored to a buffer on the remote system. The
ntb Linux driver uses this point-to-point communication as a method to
transfer data from one system to the other.

If unsure, say N.

3 changes: 3 additions & 0 deletions drivers/ntb/Makefile
@@ -0,0 +1,3 @@
obj-$(CONFIG_NTB) += ntb.o

ntb-objs := ntb_hw.o ntb_transport.o

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