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Set DMA coherent pool size to 2MB #3040

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Set DMA coherent pool size to 2MB #3040

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ThomasKaiser
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This is needed for UAS attached storage (mkfs -V -t ext4 -b 4096 -m 0 -E lazy_itable_init=0,lazy_journal_init=0) and also for some DVB dongles.

Details: https://forum.armbian.com/topic/4811-uas-mainline-kernel-coherent-pool-memory-size/ (in case you'll ever release a 64-bit kernel the same change is needed at arch/arm64/mm/dma-mapping.c)

Set DMA coherent pool size to 2MB
dccbf47 
This is needed for UAS attached storage (mkfs -V -t ext4 -b 4096 -m 0 -E lazy_itable_init=0,lazy_journal_init=0) and also for some DVB dongles.

Details: https://forum.armbian.com/topic/4811-uas-mainline-kernel-coherent-pool-memory-size/ (in case you'll ever release a 64-bit kernel the same change is needed at arch/arm64/mm/dma-mapping.c)
@P33M
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P33M commented Jul 2, 2019

See: #2924

The parameter can be altered by a cmdline.txt setting. Increasing the reservation as a #define reduces the available memory for other users, so the preference is to increase it on a case-by-case basis.

@pelwell
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pelwell commented Jul 2, 2019

The downstream dts files currently set coherent_pool to 1m for all Pis except Pi 4, which is an anomaly.

@P33M
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P33M commented Jul 2, 2019

The coherent_pool requirement was a function of plugging many devices into dwc_otg - but if UAS on Pi4 can hit this limit as well then I don't see why Pi4 shouldn't follow suit.

@ThomasKaiser
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if UAS on Pi4 can hit this limit as well

It will. Increasing to 1M is already sufficient for this use case (UAS).

BTW: In case you didn't notice. The new VL805 firmware trashes IOPS at small block sizes (not an issue with HDD but users with databases on SSD should be aware).

@pelwell
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pelwell commented Jul 2, 2019

We did notice, and are currently trying to identify the triggers and failure mechanism. Note that on the drive I've managed to reproduce the issue on (it doesn't affect all of them), the throughput reduction is caused by an occasional bus reset rather than a general slowing down.

@ThomasKaiser
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@pelwell thank you for the additional info, I might repeat my USB storage torture test then (simulating power losses while writing to two UAS connected SSDs).

As a reference dmesg output with the above mkfs command:

[   86.142573] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.142700] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.142832] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.142973] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.146756] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.146899] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.147052] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.151556] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.156548] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.156705] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.170206] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.170351] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.170502] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.170662] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.185078] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.208287] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.208441] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.208596] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.208762] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.227766] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.251190] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.251338] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.251492] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.251655] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.276160] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.310240] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.310366] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.310499] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.310640] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.332262] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.332389] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.332586] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.332774] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.342189] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.359692] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.359844] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.360002] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.360162] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.369052] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.391006] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.391133] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.391266] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.391407] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.400738] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.418230] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.418357] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.418489] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.418630] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.436921] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.445378] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.445529] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.445683] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.445848] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.468816] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.477200] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.477326] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.477458] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.477604] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.499246] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.499380] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.499520] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.499663] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.503916] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.526189] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.526353] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.526516] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.526685] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.540623] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.553186] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.553340] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.553499] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.553676] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.567127] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.580147] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.580296] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.580459] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.580623] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.598698] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.607009] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.607136] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.607268] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.607410] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.629021] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.629181] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.629341] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.629506] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.633714] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.655490] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.655619] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.655753] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.655896] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.664635] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.677413] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.677539] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.677672] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.677814] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.695408] xhci_hcd 0000:01:00.0: WARN Wrong bounce buffer write length: 1024 != 0
[   86.698866] xhci_hcd 0000:01:00.0: Ring expansion failed
[   86.698944] sd 0:0:0:0: [sda] tag#23 data out submit err -12 uas-tag 21 inflight: s-out a-cmd s-cmd 
[   86.698951] sd 0:0:0:0: [sda] tag#23 CDB: opcode=0x2a 2a 00 00 40 f1 00 00 04 00 00
[   86.700279] xhci_hcd 0000:01:00.0: Ring expansion failed
[   86.700359] sd 0:0:0:0: [sda] tag#23 data out submit err -12 uas-tag 21 inflight: s-out a-cmd s-cmd work 
[   86.700366] sd 0:0:0:0: [sda] tag#23 CDB: opcode=0x2a 2a 00 00 40 f1 00 00 04 00 00
[   86.700598] xhci_hcd 0000:01:00.0: Ring expansion failed
[   86.700670] sd 0:0:0:0: [sda] tag#23 data out submit err -12 uas-tag 21 inflight: s-out a-cmd s-cmd work 
[   86.700675] sd 0:0:0:0: [sda] tag#23 CDB: opcode=0x2a 2a 00 00 40 f1 00 00 04 00 00
[   86.700866] xhci_hcd 0000:01:00.0: Ring expansion failed
[   86.700937] sd 0:0:0:0: [sda] tag#23 data out submit err -12 uas-tag 21 inflight: s-out a-cmd s-cmd work 
[   86.700943] sd 0:0:0:0: [sda] tag#23 CDB: opcode=0x2a 2a 00 00 40 f1 00 00 04 00 00
[   86.701140] xhci_hcd 0000:01:00.0: Ring expansion failed
[   86.701212] sd 0:0:0:0: [sda] tag#23 data out submit err -12 uas-tag 21 inflight: s-out a-cmd s-cmd work 
[   86.701217] sd 0:0:0:0: [sda] tag#23 CDB: opcode=0x2a 2a 00 00 40 f1 00 00 04 00 00
[   86.701404] xhci_hcd 0000:01:00.0: Ring expansion failed
[   86.701476] sd 0:0:0:0: [sda] tag#23 data out submit err -12 uas-tag 21 inflight: s-out a-cmd s-cmd work 
[   86.701481] sd 0:0:0:0: [sda] tag#23 CDB: opcode=0x2a 2a 00 00 40 f1 00 00 04 00 00
[   86.701690] xhci_hcd 0000:01:00.0: Ring expansion failed
[   86.701762] sd 0:0:0:0: [sda] tag#23 data out submit err -12 uas-tag 21 inflight: s-out a-cmd s-cmd work 
[   86.701767] sd 0:0:0:0: [sda] tag#23 CDB: opcode=0x2a 2a 00 00 40 f1 00 00 04 00 00
[   86.701972] xhci_hcd 0000:01:00.0: Ring expansion failed
[   86.702046] sd 0:0:0:0: [sda] tag#23 data out submit err -12 uas-tag 21 inflight: s-out a-cmd s-cmd work 
[   86.702051] sd 0:0:0:0: [sda] tag#23 CDB: opcode=0x2a 2a 00 00 40 f1 00 00 04 00 00
[   86.702238] xhci_hcd 0000:01:00.0: Ring expansion failed
[   86.702310] sd 0:0:0:0: [sda] tag#23 data out submit err -12 uas-tag 21 inflight: s-out a-cmd s-cmd work 
[   86.702315] sd 0:0:0:0: [sda] tag#23 CDB: opcode=0x2a 2a 00 00 40 f1 00 00 04 00 00
[   86.702514] xhci_hcd 0000:01:00.0: Ring expansion failed
[   86.702588] sd 0:0:0:0: [sda] tag#23 data out submit err -12 uas-tag 21 inflight: s-out a-cmd s-cmd work 
[   86.702593] sd 0:0:0:0: [sda] tag#23 CDB: opcode=0x2a 2a 00 00 40 f1 00 00 04 00 00

Tons of these last messages following. Closing in the hope of an adoption of the RPi 4 DT.

@ThomasKaiser ThomasKaiser deleted the patch-1 branch July 2, 2019 16:03
pelwell pushed a commit that referenced this pull request Jul 2, 2019
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
dbb5d67 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
@pelwell
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pelwell commented Jul 2, 2019

That's an interesting datapoint. With a 1M coherent_pool I still see the bounce buffer warnings (N.B. the XHCI driver uses bounce buffers internally - these are not the bounce buffers used by the PCIe driver to manage the fourth GB of a 4GB Pi). Setting it to 2M didn't make any obvious improvement, so I've pushed the 1M change.

pelwell pushed a commit that referenced this pull request Jul 19, 2019
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
dd32841 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
pelwell pushed a commit that referenced this pull request Jul 19, 2019
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
1dde142 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
pelwell pushed a commit that referenced this pull request Jul 19, 2019
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
a88de84 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
pelwell pushed a commit that referenced this pull request Jul 19, 2019
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
6ac5486 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
TiejunChina pushed a commit that referenced this pull request Jul 23, 2019
@TiejunChina
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
be968b0 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Jul 25, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
1da0516 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Jul 25, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
01970a5 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Jul 31, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
5230602 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Jul 31, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
215e9f3 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Aug 5, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
d9f27ab 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Aug 15, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
266307e 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Aug 28, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
f5bbdf4 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Aug 30, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
a779925 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
jason77-wang pushed a commit to jason77-wang/eoan-rpi4 that referenced this pull request Sep 1, 2019
@jason77-wang
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
85c1c07 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: raspberrypi/linux#3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Sep 6, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
afca27a 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Sep 17, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
6722158 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
mike-scott pushed a commit to mike-scott/linux that referenced this pull request Sep 17, 2019
@mike-scott
[FIO fromlist] arm: dts: Add coherent_pool=1M to Pi 4 bootargs
25cabbe 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: raspberrypi/linux#3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
Signed-off-by: Michael Scott <mike@foundries.io>
popcornmix pushed a commit that referenced this pull request Oct 4, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
eefe0a4 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
popcornmix pushed a commit that referenced this pull request Oct 11, 2019
@popcornmix
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
bb68f19 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
pelwell pushed a commit that referenced this pull request Oct 29, 2019
arm: dts: Add coherent_pool=1M to Pi 4 bootargs
d5024b4 
Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel
command line to aid the dwc_otg driver, but this excluded Pi 4 which
uses a new XCHI interface instead. UAS also benefits from a larger
coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts.

See: #3040

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
@olifre olifre mentioned this pull request Feb 22, 2020
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3 participants
@ThomasKaiser @P33M @pelwell