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drm: rcar-du: Add R8A779H0 SoC support
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Add support for R-Car V4M (r8a779h0), whose
specifications are quite similar to R-Car V4H.

Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
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@h2phong @tamtranng
h2phong authored and tamtranng committed Nov 20, 2023
1 parent 3396171 commit f2fc331
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Showing 6 changed files with 45 additions and 15 deletions.
10 changes: 5 additions & 5 deletions drivers/gpu/drm/rcar-du/rcar_du_crtc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@ static bool rcar_du_register_access_check(struct rcar_du_crtc *rcrtc, u32 reg)
return true;
}
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779A0_REGS) ||
rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779G0_REGS))
rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN4_REGS))
return false;
}

Expand All @@ -77,7 +77,7 @@ static bool rcar_du_register_access_check(struct rcar_du_crtc *rcrtc, u32 reg)
return false;
}
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779A0_REGS) ||
rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779G0_REGS))
rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN4_REGS))
return false;
}

Expand Down Expand Up @@ -634,7 +634,7 @@ static int rcar_du_crtc_get(struct rcar_du_crtc *rcrtc)
*/
if (rcdu->info->mipi_dsi_clk_mask) {
struct drm_bridge *bridge = rcdu->mipi_dsi[rcrtc->index];
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779G0_REGS) &&
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN4_REGS) &&
rcrtc->index == 1)
{
struct rcar_dsc *dsc = bridge->driver_private;
Expand Down Expand Up @@ -681,7 +681,7 @@ static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc)

if (rcdu->info->mipi_dsi_clk_mask) {
struct drm_bridge *bridge = rcdu->mipi_dsi[rcrtc->index];
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779G0_REGS) &&
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN4_REGS) &&
rcrtc->index == 1)
{
struct rcar_dsc *dsc = bridge->driver_private;
Expand Down Expand Up @@ -1359,7 +1359,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex,
rcrtc->dsysr = (rcrtc->index % 2 ? 0 : DSYSR_DRES) | DSYSR_TVM_TVSYNC;
/* In V3U, the bit TVM and SCM are always set to 0 */
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779A0_REGS) ||
rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779G0_REGS))
rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN4_REGS))
rcrtc->dsysr = rcrtc->dsysr &
~(DSYSR_SCM_MASK | DSYSR_TVM_MASK);

Expand Down
22 changes: 22 additions & 0 deletions drivers/gpu/drm/rcar-du/rcar_du_drv.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -509,6 +509,7 @@ static const struct rcar_du_device_info rcar_du_r8a779g0_info = {
.gen = 4,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_GEN4_REGS
| RCAR_DU_FEATURE_R8A779G0_REGS,
.channels_mask = BIT(1) | BIT(0),
.routes = {
Expand All @@ -528,6 +529,26 @@ static const struct rcar_du_device_info rcar_du_r8a779g0_info = {
.mipi_dsi_clk_mask = BIT(1) | BIT(0),
};

static const struct rcar_du_device_info rcar_du_r8a779h0_info = {
.gen = 4,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_GEN4_REGS
| RCAR_DU_FEATURE_R8A779H0_REGS,
.channels_mask = BIT(0),
.routes = {
/*
* R8A779H0 has only one MIPI DSI output.
*/
[RCAR_DU_OUTPUT_MIPI_DSI0] = {
.possible_crtcs = BIT(0),
.port = 0,
},
},
.num_mipi_dsi = 1,
.mipi_dsi_clk_mask = BIT(0),
};

static const struct of_device_id rcar_du_of_table[] = {
{ .compatible = "renesas,du-r8a7742", .data = &rcar_du_r8a7790_info },
{ .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info },
Expand All @@ -554,6 +575,7 @@ static const struct of_device_id rcar_du_of_table[] = {
{ .compatible = "renesas,du-r8a77995", .data = &rcar_du_r8a7799x_info },
{ .compatible = "renesas,du-r8a779a0", .data = &rcar_du_r8a779a0_info },
{ .compatible = "renesas,du-r8a779g0", .data = &rcar_du_r8a779g0_info },
{ .compatible = "renesas,du-r8a779h0", .data = &rcar_du_r8a779h0_info },
{ }
};

Expand Down
4 changes: 3 additions & 1 deletion drivers/gpu/drm/rcar-du/rcar_du_drv.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,9 @@ struct rcar_du_device;
#define RCAR_DU_FEATURE_R8A77990_REGS BIT(7) /* Use R8A77990 registers */
#define RCAR_DU_FEATURE_R8A77995_REGS BIT(8) /* Use R8A77995 registers */
#define RCAR_DU_FEATURE_R8A779A0_REGS BIT(9) /* Use R8A779A0 registers */
#define RCAR_DU_FEATURE_R8A779G0_REGS BIT(10) /* Use R8A779A0 registers */
#define RCAR_DU_FEATURE_GEN4_REGS BIT(10) /* Use Gen4 (R8A779G0, R8A779H0) registers */
#define RCAR_DU_FEATURE_R8A779G0_REGS BIT(11) /* Use R8A779G0 registers */
#define RCAR_DU_FEATURE_R8A779H0_REGS BIT(12) /* Use R8A779H0 registers */

#define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */

Expand Down
20 changes: 13 additions & 7 deletions drivers/gpu/drm/rcar-du/rcar_du_group.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -136,6 +136,10 @@ static void rcar_du_group_setup_didsr(struct rcar_du_group *rgrp)
*/
rcrtc = &rcdu->crtcs[rgrp->index * 2];
num_crtcs = rgrp->num_crtcs;
} else if (rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779H0_REGS)) {
/* R-Car V4M (R8A779H0) has only one channel. */
rcrtc = rcdu->crtcs;
num_crtcs = rcdu->num_crtcs;
}

if (!num_crtcs)
Expand Down Expand Up @@ -171,7 +175,7 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp)
rcar_du_group_write(rgrp, DEFR5, DEFR5_CODE | DEFR5_DEFE5);

if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779A0_REGS) &&
!rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779G0_REGS))
!rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN4_REGS))
rcar_du_group_setup_pins(rgrp);

/*
Expand All @@ -185,7 +189,7 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp)

if (rcdu->info->gen >= 2) {
if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779A0_REGS) &&
!rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779G0_REGS))
!rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN4_REGS))
rcar_du_group_setup_defr8(rgrp);
rcar_du_group_setup_didsr(rgrp);
}
Expand All @@ -199,11 +203,13 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp)
*/
rcar_du_group_write(rgrp, DORCR, DORCR_PG1D_DS1 | DORCR_DPRS);

/* Apply planes to CRTCs association. */
mutex_lock(&rgrp->lock);
rcar_du_group_write(rgrp, DPTSR, (rgrp->dptsr_planes << 16) |
rgrp->dptsr_planes);
mutex_unlock(&rgrp->lock);
if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779H0_REGS)) {
/* Apply planes to CRTCs association. */
mutex_lock(&rgrp->lock);
rcar_du_group_write(rgrp, DPTSR, (rgrp->dptsr_planes << 16) |
rgrp->dptsr_planes);
mutex_unlock(&rgrp->lock);
}
}

void rcar_du_pre_group_set_routing(struct rcar_du_group *rgrp,
Expand Down
2 changes: 1 addition & 1 deletion drivers/gpu/drm/rcar-du/rcar_du_plane.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -508,7 +508,7 @@ static void rcar_du_plane_setup_format_gen3_4(struct rcar_du_group *rgrp,
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A7795_REGS)) {
pnmr = PnMR_SPIM_TP_OFF | state->format->pnmr;
} else if (rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779A0_REGS) ||
rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779G0_REGS)) {
rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN4_REGS)) {
pnmr = PnMR_SPIM_TP_OFF | (state->format->pnmr & ~PnMR_SPIM_ALP);
} else {
if (rgrp->index == 0)
Expand Down
2 changes: 1 addition & 1 deletion drivers/gpu/drm/rcar-du/rcar_du_vsp.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -77,7 +77,7 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
};

if (rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779A0_REGS) ||
rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A779G0_REGS))
rcar_du_has(rcdu, RCAR_DU_FEATURE_GEN4_REGS))
state.format = rcar_du_format_info(DRM_FORMAT_XRGB8888);

if (rcdu->info->gen >= 3)
Expand Down

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