CPC Fourrom Card
This project is a CPLD-based ROM expansion board. Although only 2 sockets are provided each can be filled with a 'double size' EEPROM to provide the equivalent of 4 classic 16KByte Amstrad ROMs.
The board will co-exist with other ROM cards and uses DIP switches to enable or disable ROMs individually and to select how the ROMs on the card will be numbered to avoid clashes with other cards.
This card isn't recommended for new builds - better to use the CPC Sixrom Card instead which fits another socket into a board barely any larger.
The ROM selection logic is contained inside a Xilinx XC9535 or XC9572 CPLD.
ROMs are selected by writing an 8 bit ROM ID to any IO port address with bit A13 low.
Each ROM socket can take any one of
- a 2764 8K EPROM
- a 27128 16K EPROM (the classic AMSTRAD ROM size)
- a 28C256 32K EEPROM
- a 27256 32K EEPROM
The standard CPLD firmware is optimized for use with 28C256 EEPROMs. Each of these can hold two classic ROMs which are mapped into the upper and lower address ranges for the socket and can be enabled or disabled individually.
When using a 2764 or 27128 the ROM selection switch (see below) should be set to select only the low ROM for that socket to avoid the ROM appearing twice in the Amstrad's address space.
A 27256 EPROM can also hold two classic ROMs but these need to be used with care. Due to a small pin incompatibility with the 28C256 EEPROM use of the 27256 needs to be enabled by switching on a DIP switch for the relevant socket (see below for details). However, using an EEPROM in the socket with the DIP switch ON will result in the EEPROM losing its contents. Be sure that it is a 27256 you're using before throwing that switch.
DIP switches 1-4 are used to enable ROMs according to the following table
| DIP Switch | ON |
|---|---|
| 1 | enable lower ROM SKT01 |
| 2 | enable upper ROM SKT01 |
| 3 | enable lower ROM SKT23 |
| 4 | enable upper ROM SKT23 |
DIP switches 5-6 select the ROM numbers to be assigned to each socket as follows
| DIP6 | DIP5 | SKT01 | SKT23 | Comment |
|---|---|---|---|---|
| OFF | OFF | Lower ROM, ROM 0 [BASIC] | ROM 1, ROM 2 | Lower ROM and BASIC replacement and first ROM bank |
| OFF | ON | ROM 1, ROM 2 | ROM 3, ROM 4 | First ROM Bank |
| ON | OFF | ROM 5, ROM 6 | ROM 9, ROM 14 | Additional slots in first bank and second bank |
| ON | ON | ROM 10, ROM 11 | ROM 12, ROM 13 | FutureOS compatible slots in bank 2 |
Finally the DIP switches 7 and 8 enable full use of 27256 EPROMS by switching the MSB of the address to pin 27.
| DIP | Comment |
|---|---|
| 7 | Selects 27256 EPROM in SKT01 |
| 8 | Selects 27256 EPROM in SKT23 |
WARNING: DO NOT SET DIP SWITCHES 7 OR 8 to ON WHEN 28C256 EEPROMS ARE BEING USED
The 27256 EPROM needs to have the MSB of the address on pin 27, but the 28C256 uses that pin for the write enable (WE*) control signal. Switching on DIP7 (or DIP8) will mean that a 28C256 in SKT01 (or SKT02) will be corrupted. No electrical damage will occur but the EEPROM contents will be lost.
Unfortunately the PLCC44 packaged parts for the XC9536 or XC9572 CPLDs are now obsolete. However they are still available from various sellers, including UTSource.com. In particular the XC9536 can still be had for around 3GBP in 2018 and that part is easily large enough to accommodate the logic for either the cpc_sixrom or cpc_fourrom boards.
All programs and data files in this project are made available under the terms of the GNU General Public License v3.
