Merge pull request #440 from riscv-boom/hella_asser

[lsu] Strengthen hellacache interface assert
riscv-boom · Mar 5, 2020 · a16e74a · a16e74a
2 parents f12688f + c56ef3d
commit a16e74a
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/src/main/scala/lsu/lsu.scala b/src/main/scala/lsu/lsu.scala
@@ -564,7 +564,7 @@ class LSU(implicit p: Parameters, edge: TLEdgeOut) extends BoomModule()(p)
   //--------------------------------------------
   // TLB Access
 
-  assert(hella_req.cmd =/= rocket.M_SFENCE,
+  assert(!(hella_state =/= h_ready && hella_req.cmd === rocket.M_SFENCE),
     "SFENCE through hella interface not supported")
 
   val exe_tlb_uop = widthMap(w =>