[rocc] Fix Rocc PNR waking

riscv-boom · May 10, 2019 · f4968d7 · f4968d7
1 parent 65936a1
commit f4968d7
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Showing 2 changed files with 3 additions and 1 deletion.
diff --git a/src/main/scala/exu/core.scala b/src/main/scala/exu/core.scala
@@ -621,7 +621,8 @@ class BoomCore(implicit p: Parameters, edge: freechips.rocketchip.tilelink.TLEdg
   // The 0th wakeup port goes to the ll_wbarb
   int_iss_wakeups(0).valid := ll_wbarb.io.out.fire() && ll_wbarb.io.out.bits.uop.dst_rtype === RT_FIX
   int_iss_wakeups(0).bits  := ll_wbarb.io.out.bits
-  int_ren_wakeups(0).valid := ll_wbarb.io.out.fire()
+
+  int_ren_wakeups(0).valid := ll_wbarb.io.out.fire() && ll_wbarb.io.out.bits.uop.dst_rtype === RT_FIX
   int_ren_wakeups(0).bits  := ll_wbarb.io.out.bits
 
   // loop through each issue-port (exe_units are statically connected to an issue-port)

diff --git a/src/main/scala/exu/rob.scala b/src/main/scala/exu/rob.scala
@@ -799,6 +799,7 @@ class Rob(
   full       := rob_tail === rob_head && maybe_full
   empty      := (rob_head === rob_tail) && (rob_head_vals.asUInt === 0.U)
 
+  io.rob_head_idx := rob_head_idx
   io.rob_tail_idx := rob_tail_idx
   io.rob_pnr_idx  := rob_pnr_idx
   io.empty        := empty