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Bugfix: take static rounding mode into account in FDivSqrtUnit #629

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merged 1 commit into from Feb 15, 2023
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Bugfix: take static rounding mode into account in FDivSqrtUnit #629

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2 changes: 1 addition & 1 deletion src/main/scala/exu/execution-units/fdiv.scala
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Expand Up @@ -122,7 +122,7 @@ class FDivSqrtUnit(implicit p: Parameters)
r_buffer_req.uop.br_mask := GetNewBrMask(io.brupdate, io.req.bits.uop)
r_buffer_fin <> fdiv_decoder.io.sigs

r_buffer_fin.rm := io.fcsr_rm
r_buffer_fin.rm := Mux(ImmGenRm(io.req.bits.uop.imm_packed) === 7.U, io.fcsr_rm, ImmGenRm(io.req.bits.uop.imm_packed))
r_buffer_fin.typ := 0.U // unused for fdivsqrt
val tag = fdiv_decoder.io.sigs.typeTagIn
r_buffer_fin.in1 := unbox(io.req.bits.rs1_data, tag, Some(tile.FType.D))
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