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Co-authored-by: Paul Kirth <paulkirth@google.com>
Signed-off-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>

riscv-elf.adoc

@@ -941,8 +941,8 @@ typedef struct
 
 ==== TLS Descriptors
 
-TLS Descriptors (TLSDESC) is an alternative implementation of the Global Dynamic model
-that additionally allows the dynamic linker to achieve performance close to that
+TLS Descriptors (TLSDESC) are an alternative implementation of the Global Dynamic model
+that allows the dynamic linker to achieve performance close to that
 of Initial Exec when the library was not loaded dynamically with `dlopen`.
 
 For each `TLSDESC` relocation inside the GOT, the dynamic linker fills in the
@@ -982,10 +982,10 @@ label:
 
 `tX` and `tY` in the example may be replaced with any combination of two general purpose registers.
 
-The linker can use the relocations to recognize the sequence and to perform relaxations. To ensure this correctly, only the following changes to the sequence are allowed:
+The linker can use the relocations to recognize the sequence and to perform relaxations. To ensure correctness, only the following changes to the sequence are allowed:
 
-- Other instructions that does not clobber the registers used by the sequence may be inserted in between (known as instruction scheduling).
-- Instructions in the sequence with no data dependency may be reordered. For this sequence, the only instructions that can be reordered are `lw` and `addi`.
+- Instructions outside of the sequence that do not clobber the registers used within the sequence may be inserted in-between the instructions of the sequence (known as instruction scheduling).
+- Instructions in the sequence with no data dependency may be reordered. In the preceding example, the only instructions that can be reordered are `lw` and `addi`.
 
 === Sections
 
@@ -1583,7 +1583,7 @@ Relaxation result:
 
 Target Relocation:: R_RISCV_TLSDESC_HI20, R_RISCV_TLSDESC_LOAD_LO12_I, R_RISCV_TLSDESC_ADD_LO12_I, R_RISCV_TLSDESC_CALL
 
-Description:: This relaxation can relax a sequence loading address of a thread-local symbol reference into a GOT load instruction.
+Description:: This relaxation can relax a sequence loading the address of a thread-local symbol reference into a GOT load instruction.
 
 Condition:: None.
 
@@ -1619,7 +1619,7 @@ Relaxation result:
 
 Target Relocation:: R_RISCV_TLSDESC_HI20, R_RISCV_TLSDESC_LOAD_LO12_I, R_RISCV_TLSDESC_ADD_LO12_I, R_RISCV_TLSDESC_CALL
 
-Description:: This relaxation can relax a sequence loading address of a thread-local symbol reference into a thread-pointer-relative instruction sequence.
+Description:: This relaxation can relax a sequence loading the address of a thread-local symbol reference into a thread-pointer-relative instruction sequence.
 
 Condition::