Simplify the intrinsics by blending non-policy / policy intrinsics into a single set

[eopXD]

Intro

This works implements the simplification proposal proposed by Nick Knight @nick-knight [0]. The simplification proposal targets to blend the two existing sets of intrinsics, non-policy / policy intrinsics, into a single set, with default assumption of policy behavior as TAMA. The simplification reduces 25% of the overall out-going intrinsics.

This pull request can be split into 3 parts.

• Change default TUMU intrinsics to TUMA
• Change all intrinsics from TAMU to TAMA
• Simplify intrinsics with policy suffix

The recommended way of reviewing this patch is to checkout the changes under each instruction mnemonics. Take vadd for example, you can checkout auto-generated/api-testing/vadd.c, auto-generated/overloaded-api-testing/vadd.c, auto-generated/policy_funcs/llvm-api-tests/vadd.c, auto-generated/policy_funcs/llvm-overloaded-tests/vadd.c to see the prototype changes.

[0] https://gist.github.com/nick-knight/6cb0b74b351a25323dfb1821d3a269b9

Overview

For intrinsics originally with default as TAMU

Before:

vint32m1_t vadd_vv_i32m1 (vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_m (vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_tu (vint32m1_t merge, vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_ta (vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_tuma (vbool32_t mask, vint32m1_t merge, vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_tumu (vbool32_t mask, vint32m1_t merge, vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_tama (vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_tamu (vbool32_t mask, vint32m1_t merge, vint32m1_t op1, vint32m1_t op2, size_t vl);

After:

vint32m1_t vadd_vv_i32m1 (vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_m (vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_tu (vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_tum (vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_tumu (vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl);
vint32m1_t vadd_vv_i32m1_mu (vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl);

For intrinsics originally with default as TUMU

Before:

vint32m1_t vredsum_vs_i32m1_i32m1 (vint32m1_t dest, vint32m1_t vector, vint32m1_t scalar, size_t vl);
vint32m1_t vredsum_vs_i32m1_i32m1_m (vbool32_t mask, vint32m1_t dest, vint32m1_t vector, vint32m1_t scalar, size_t vl);vint32m1_t vredsum_vs_i32m1_i32m1_tu (vint32m1_t merge, vint32m1_t vector, vint32m1_t scalar, size_t vl);
vint32m1_t vredsum_vs_i32m1_i32m1_ta (vint32m1_t vector, vint32m1_t scalar, size_t vl);
vint32m1_t vredsum_vs_i32m1_i32m1_tum (vbool32_t mask, vint32m1_t merge, vint32m1_t vector, vint32m1_t scalar, size_t vl);
vint32m1_t vredsum_vs_i32m1_i32m1_tam (vbool32_t mask, vint32m1_t vector, vint32m1_t scalar, size_t vl);

After:

vint32m1_t vredsum_vs_i32m1_i32m1 (vint32m1_t vector, vint32m1_t scalar, size_t vl);
vint32m1_t vredsum_vs_i32m1_i32m1_m (vbool32_t mask, vint32m1_t vector, vint32m1_t scalar, size_t vl);
vint32m1_t vredsum_vs_i32m1_i32m1_tu (vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl);
vint32m1_t vredsum_vs_i32m1_i32m1_tum (vbool32_t mask, vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl);

For the 1st ~ 3rd commit

The first part is needed before performing the second one, as the TUMU intrinsics are the special cases in the intrinsics and hope to be removed in the simplification [0].

Corresponding changes in LLVM is posted here:

• D140895 [1/7][Clang][RISCV] Remove default tail-undisturbed for vector reduction intrinsics
• D140936 [2/7][Clang][RISCV] Remove default tail-undisturbed for vslideup intrinsics
• D140937 [3/7][Clang][RISCV] Remove default tail-undisturbed for vslidedown intrinsics
• D140941 [4/7][Clang][RISCV] Remove default tail-undisturbed for multiply-add intrinsics
• D140942 [5/7][Clang][RISCV] Remove default tail-undisturbed for vcompress intrinsics
• D140947 [6/7][Clang][RISCV] Remove default tail-undisturbed for vmv_s_x and vfmv_s_f intrinsics
• D140954 [7/7][Clang][RISCV][NFC] Remove attribute IsPrototypeDefaultTU

For the 4th ~ 6th commit

The second part aligns all non-policy intrinsics to TAMA, which in general should be the default policy for the RVV instructions because a undisturbed policy will generally slow down an out-of-order core.

The masked-off operand for non-policy masked intrinsics is removed because the policy is set to TAMA.

Corresponding changes in LLVM is posted here:

• D141573 [1/15][Clang][RISCV][NFC] Extract common utility to RISCVVIntrinsicUtils
• D141574 [2/15][Clang][RISCV][NFC] Rename Policy::IsPolicyNone to IsUnspecifed
• D141575 [3/15][Clang][RISCV][NFC] Clarify edge cases of RVVIntrinsic::getSupportedMaskedPolicies for clarity
• D141577 [4/15][Clang][RISCV][NFC] Remove unnecessary logic under RVVIntrinsic::computeBuiltinTypes
• D141754 [5/15][Clang][RISCV][NFC] Remove extra attribute Policy::IntrinsicWithoutMU by reusing HasTailPolicy and HasMaskPolicy
• D141756 [6/15][Clang][RISCV][NFC] Instructions with a mask destination register is always tail agnostic
• D141759 [7/15][Clang][RISCV][NFC] Correct the default value for Policy to TAMU
• D141762 [8/15][Clang][RISCV][NFC] Always emit PolicyAttr in riscv_vector_builtin_cg.inc
• D141764 [9/15][Clang][RISCV][NFC] Use correct type for RVVTypeCache::computeTypes under RISCVVEmitter.cpp
• D141767 [10/15][Clang][RISCV][NFC] Don't need to check for MaskPolicy in isTAPolicy and isTUPolicy
• D141768 [[11/15][Clang][RISCV][NFC] Remove Policy::PolicyType::Omit](https://reviews.llvm.org/D141768)
• D141789 [12/15][Clang][RISCV][NFC] Refine the way to check for Policy in riscv_vector_builtin_cg.inc
• D141792 [13/15][Clang][RISCV][NFC] Remove repeating test cases under rvv-intrinsics-autogenerated
• D141793 [14/15][Clang][RISCV] Change default policy from TAMU to TAMA
• D141796 [15/15][Clang][RISCV][NFC] Set data member under Policy as constants

For the 7th ~ 9th commit

The third part is the simplification intrinsics with a tail policy suffix.

• Policy intrinsics of _ta, _tama is removed, as non-policy intrinsics is default to TAMA and we are blending the two sets of intrinsics (non-policy / policy) into one.
• Policy intrinsics of _tamu is renamed to _mu
• Policy intrinsics of _tuma is renamed to _tum

Corresponding changes in LLVM is posted here:

• D142016 [Clang][RISCV] Simplify RVV intrinsic policy suffix

[eopXD]

Change: Having the simplification collected all under this PR because it makes more sense to have accept them as a whole.

Revised the cover letter of this pull request.

[nick-knight]

I believe this correctly implements my proposal. Good work!

My only complaint is the logical organization of the repository into intrinsics_funcs and policy_funcs: I would prefer to keep them all in the same directory. This is a minor complaint and I think it could be addressed in a follow-up PR.

[eopXD]

My only complaint is the logical organization of the repository into intrinsics_funcs and policy_funcs: I would prefer to keep them all in the same directory. This is a minor complaint and I think it could be addressed in a follow-up PR.

Yes, the hierarchy will be refined. Thank you for mentioning this.

[zakk0610]

Cool, I like this simplification version, thanks for making it happen!

nit: maybe we could have a tag before change the interface.