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firmware: Reset all registers and flush icache
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A warm reset using reset button may put icache and registers
in non-coherent state.

Flush the icache and reset all registers for every hart.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
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atishp04 committed Mar 6, 2019
1 parent e1e5848 commit dd1dce5
Showing 1 changed file with 4 additions and 0 deletions.
4 changes: 4 additions & 0 deletions firmware/fw_base.S
Expand Up @@ -25,6 +25,8 @@ _start:
csrr a6, CSR_MHARTID
blt zero, a6, _wait_for_boot_hart

li ra, 0
call _reset_regs
/* Zero-out BSS */
la a4, _bss_start
la a5, _bss_end
Expand Down Expand Up @@ -391,6 +393,8 @@ _trap_handler_all_mode:
.globl _reset_regs
_reset_regs:

/* flush the instruction cache */
fence.i
/* Reset all registers except ra, a0,a1 */
li sp, 0
li gp, 0
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