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target/riscv: support log memory access128 #819

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merged 2 commits into from
Apr 4, 2023

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zqb-all
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@zqb-all zqb-all commented Mar 22, 2023

log_memory_access only support size 1/2/4/8, let write_memory_bus_v1 call log_memory_access multiple times to fix size assert fail.

Change-Id: I6b22c97f81fac26703b66d3dbd8b6d41aaea4875

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Hi @zqb-all, thank you for submittng this change.

My recommendation would be to implement this differently: extend log_memory_access() function to accept 128-bit values instead of calling it multiple times with smaller values. That's because one 128-bit memory access is a different thing than four 32-bit accesses - and the log messages should clearly reflect that.

Note: I understand it can be tricky to extend log_memory_access() to accept 128-bit inputs since support of 128-bit integer data types is not required by the C standard (1, 2). So you can create a second function log_memory_access128() that would accept an array as an argument.

Also, how have you tested these changes?

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zqb-all commented Mar 22, 2023

My recommendation would be to implement this differently: extend log_memory_access() function to accept 128-bit values instead of calling it multiple times with smaller values. That's because one 128-bit memory access is a different thing than four 32-bit accesses - and the log messages should clearly reflect that.

Thanks,I will modify patch in this way

Also, how have you tested these changes?

I have a riscv board with a cpu that supports sbaccess128,debug it with openocd and do some memory writes can trigger this assert

@zqb-all zqb-all changed the title target/riscv: fix write_memory_bus_v1 size assert fail target/riscv: support log memory access128 Mar 23, 2023
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zqb-all commented Mar 23, 2023

log show like this:

Debug: 28502 73591 riscv-013.c:2582 log_memory_access128(): M[0x40020f70] writes 0x0000001300000013b7ed56f580820141
Debug: 28503 73591 riscv-013.c:2582 log_memory_access128(): M[0x40020f80] writes 0x879700a7e86303f007930800e4221141
Debug: 28504 73592 riscv-013.c:2582 log_memory_access128(): M[0x40020f90] writes 0x80820141642276a7d00b0a2787930001

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I assume that function read_memory_bus_v1() would need the same update, is that correct?

If you do not wish to do it in this merge request, that is OK. In that case please create an issue so that this "TODO" item is recorded. The changes made so far are already nice improvement over the current state.

src/target/riscv/riscv-013.c Outdated Show resolved Hide resolved
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Change-Id: I6b22c97f81fac26703b66d3dbd8b6d41aaea4875
Signed-off-by: Mark Zhuang <mark.zhuang@spacemit.com>
read/write is system function

Change-Id: I75db4dd5a1c60e9cff8a58a863a887beffc37cab
Signed-off-by: Mark Zhuang <mark.zhuang@spacemit.com>
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zqb-all commented Mar 25, 2023

I assume that function read_memory_bus_v1() would need the same update, is that correct?

Yes, thank you for pointing that out

If you do not wish to do it in this merge request, that is OK. In that case please create an issue so that this "TODO" item is recorded. The changes made so far are already nice improvement over the current state.

After this patch is merged, I will submit another patch to update read_memory_bus_v1

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@zqb-all Thank you for the changes (and I'm sorry for my not so prompt reply).

It looks all right - approved.

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I'm not a fan of renaming a bunch of trigger variables in a commit that's about logging 128-bit memory accesses.

But the code looks OK.

@timsifive timsifive merged commit 2dc1411 into riscv-collab:riscv Apr 4, 2023
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I'm not a fan of renaming a bunch of trigger variables in a commit that's about logging 128-bit memory accesses.

But the code looks OK.

Would it make more sense to split it into two discrete PRs?

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zqb-all commented Apr 5, 2023

Would it make more sense to split it into two discrete PRs?

Thanks, next time there is a similar change, I will split it into a separate PR

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zqb-all commented Apr 6, 2023

I assume that function read_memory_bus_v1() would need the same update, is that correct?

If you do not wish to do it in this merge request, that is OK. In that case please create an issue so that this "TODO" item is recorded. The changes made so far are already nice improvement over the current state.

#833

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4 participants