Merge branch 'feature/clock_control' into develop

Unified RCC HAL for Cortex-M. This feature correct a few naming inconsistencies: - `enableClock(ClockSource src, ...)` for enabling clock sources. - `setPrescaler(Prescaler pre, ...)` for setting clock prescalers. - `ClockOutput` instead of MCO. - `ClockControl` instead of `ClockTree`.
roboterclubaachen · Feb 8, 2016 · 4b67b08 · 4b67b08
2 parents 0ce8220 + 6793cdd
commit 4b67b08
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Showing 26 changed files with 360 additions and 276 deletions.
diff --git a/examples/lpcxpresso/lpc11c24/blink/main.cpp b/examples/lpcxpresso/lpc11c24/blink/main.cpp
@@ -14,9 +14,8 @@ MAIN_FUNCTION
 	// typedef ExternalOscillator<MHz12> clockSource;
 	SystemClock<clockSource>::enable();
 
-	ClockTree::connectToClockOut(ClockTree::ClockOutSource::SystemClock);
-	ClockTree::setClockOutDivision(100);
-	Gpio0_1::selectFunction(Gpio0_1::Function::ClockOut);	// TODO: replace with connect
+	ClockControl::enableClockOutput(ClockControl::ClockOutputSource::SystemClock, 100);
+	Gpio0_1::selectFunction(Gpio0_1::Function::ClockOutput);	// TODO: replace with connect
 
 	Led::setOutput();
 

diff --git a/src/xpcc/architecture/platform/devices/lpc/lpc111.xml b/src/xpcc/architecture/platform/devices/lpc/lpc111.xml
@@ -27,7 +27,7 @@
 		<driver type="uart" name="lpc" instances="1"/>
 		<driver type="gpio" name="lpc">
 			<!--<gpio port="0" id="0" func="Reset,Gpio" bits="mode,hys,od"/>-->
-			<gpio port="0" id="1"  func="Gpio,ClockOut,Timer32_0" bits="mode,hys,od"/>
+			<gpio port="0" id="1"  func="Gpio,ClockOutput,Timer32_0" bits="mode,hys,od"/>
 			<gpio port="0" id="2"  func="Gpio,Spi0,Timer16_0"     bits="mode,hys,od"/>
 			<gpio port="0" id="3"  func="Gpio"                    bits="mode,hys,od"/>
 			<gpio port="0" id="4"  func="Gpio,I2c"                bits="i2c_mode"/>

diff --git a/src/xpcc/architecture/platform/devices/lpc/lpc11c24.xml b/src/xpcc/architecture/platform/devices/lpc/lpc11c24.xml
@@ -29,7 +29,7 @@
 		<driver type="can"  name="lpc" instances="1"/>
 		<driver type="gpio" name="lpc">
 			<!--<gpio port="0" id="0" func="Reset,Gpio" bits="mode,hys,od"/>-->
-			<gpio port="0" id="1"  func="Gpio,ClockOut,Timer32_0" bits="mode,hys,od"/>
+			<gpio port="0" id="1"  func="Gpio,ClockOutput,Timer32_0" bits="mode,hys,od"/>
 			<gpio port="0" id="2"  func="Gpio,Spi0,Timer16_0"     bits="mode,hys,od"/>
 			<gpio port="0" id="3"  func="Gpio"                    bits="mode,hys,od"/>
 			<gpio port="0" id="4"  func="Gpio,I2c"                bits="i2c_mode"/>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f072-c_r_v-8_b.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f072-c_r_v-8_b.xml
@@ -124,7 +124,7 @@
         <!-- <af peripheral="Adc" name="Channel7" type="analog"/> -->
       </gpio>
       <gpio port="A" id="8">
-        <!-- <af id="0" peripheral="MCO" type="out"/> -->
+        <!-- <af id="0" peripheral="ClockOutput" type="out"/> -->
         <af id="1" peripheral="Uart1" name="Ck" type="out"/>
         <af id="1" peripheral="UartSpiMaster1" name="Sck" type="out"/>
         <af id="2" peripheral="Timer1" name="Channel1"/>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f100-c_r_v-8_b.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f100-c_r_v-8_b.xml
@@ -118,7 +118,7 @@
       </gpio>
       <gpio port="A" id="8">
         <af id="6,3,0" peripheral="Timer1" name="Channel1"/>
-        <af peripheral="MCO" type="out"/>
+        <af peripheral="ClockOutput" type="out"/>
         <af peripheral="Uart1" name="Ck" type="out"/>
         <af peripheral="UartSpiMaster1" name="Sck" type="out"/>
       </gpio>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f101_102-c_r_t_v-8_b.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f101_102-c_r_t_v-8_b.xml
@@ -118,7 +118,7 @@
         <af peripheral="Adc1" name="Channel7" type="analog"/>
       </gpio>
       <gpio port="A" id="8">
-        <af peripheral="MCO" type="out"/>
+        <af peripheral="ClockOutput" type="out"/>
         <af peripheral="Uart1" name="Ck" type="out"/>
         <af peripheral="UartSpiMaster1" name="Sck" type="out"/>
       </gpio>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f105_107-r_v-8_b_c.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f105_107-r_v-8_b_c.xml
@@ -153,7 +153,7 @@
       </gpio>
       <gpio port="A" id="8">
         <af id="6,3,0" peripheral="Timer1" name="Channel1"/>
-        <af peripheral="MCO" type="out"/>
+        <af peripheral="ClockOutput" type="out"/>
         <af peripheral="Uart1" name="Ck" type="out"/>
         <af peripheral="UartSpiMaster1" name="Sck" type="out"/>
       </gpio>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f303-c_r_v_z-b_c_d_e.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f303-c_r_v_z-b_c_d_e.xml
@@ -185,7 +185,7 @@
         <af peripheral="Adc2" name="Channel4" type="analog"/>
       </gpio>
       <gpio port="A" id="8">
-        <af id="0" peripheral="MCO" type="out"/>
+        <af id="0" peripheral="ClockOutput" type="out"/>
         <af device-size-id="d|e" device-pin-id="r|v|z" id="3" peripheral="I2cMaster3" name="Scl" type="out"/>
         <af id="6" peripheral="Timer1" name="Channel1"/>
         <af id="7" peripheral="Uart1" name="Ck" type="out"/>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f401_411-c_r_v-b_c_d_e.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f401_411-c_r_v-b_c_d_e.xml
@@ -159,7 +159,7 @@
         <af peripheral="Adc1" name="Channel7" type="analog"/>
       </gpio>
       <gpio port="A" id="8">
-        <af id="0" peripheral="MCO1" type="out"/>
+        <af id="0" peripheral="ClockOutput1" type="out"/>
         <af id="1" peripheral="Timer1" name="Channel1"/>
         <af id="4" peripheral="I2cMaster3" name="Scl" type="out"/>
         <af id="7" peripheral="Uart1" name="Ck" type="out"/>
@@ -325,7 +325,7 @@
         <af id="8" peripheral="UartSpiMaster6" name="Sck" type="out"/>
       </gpio>
       <gpio device-pin-id="r|v" port="C" id="9">
-        <af id="0" peripheral="MCO2" type="out"/>
+        <af id="0" peripheral="ClockOutput2" type="out"/>
         <af id="2" peripheral="Timer3" name="Channel4"/>
         <af id="4" peripheral="I2cMaster3" name="Sda"/>
       </gpio>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f405_407_415_417-i_o_r_v_z-e_g.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f405_407_415_417-i_o_r_v_z-e_g.xml
@@ -200,7 +200,7 @@
         <af peripheral="Adc2" name="Channel7" type="analog"/>
       </gpio>
       <gpio port="A" id="8">
-        <af id="0" peripheral="MCO1" type="out"/>
+        <af id="0" peripheral="ClockOutput1" type="out"/>
         <af id="1" peripheral="Timer1" name="Channel1"/>
         <af id="4" peripheral="I2cMaster3" name="Scl" type="out"/>
         <af id="7" peripheral="Uart1" name="Ck" type="out"/>
@@ -382,7 +382,7 @@
         <af id="8" peripheral="UartSpiMaster6" name="Sck" type="out"/>
       </gpio>
       <gpio port="C" id="9">
-        <af id="0" peripheral="MCO2" type="out"/>
+        <af id="0" peripheral="ClockOutput2" type="out"/>
         <af id="2" peripheral="Timer3" name="Channel4"/>
         <af id="3" peripheral="Timer8" name="Channel4"/>
         <af id="4" peripheral="I2cMaster3" name="Sda"/>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f410-c_r_t-8_b.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f410-c_r_t-8_b.xml
@@ -131,7 +131,7 @@
         <af peripheral="Adc1" name="Channel7" type="analog"/>
       </gpio>
       <gpio port="A" id="8">
-        <af id="0" peripheral="MCO1" type="out"/>
+        <af id="0" peripheral="ClockOutput1" type="out"/>
         <af id="1" peripheral="Timer1" name="Channel1"/>
         <af id="7" peripheral="Uart1" name="Ck" type="out"/>
         <af id="7" peripheral="UartSpiMaster1" name="Sck" type="out"/>
@@ -271,7 +271,7 @@
         <af id="8" peripheral="UartSpiMaster6" name="Sck" type="out"/>
       </gpio>
       <gpio device-pin-id="r" port="C" id="9">
-        <af id="0" peripheral="MCO2" type="out"/>
+        <af id="0" peripheral="ClockOutput2" type="out"/>
       </gpio>
       <gpio device-pin-id="r" port="C" id="10">
         <af id="2" peripheral="Timer5" name="Channel2"/>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f427_429_437_439-a_b_i_n_v_z-e_g_i.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f427_429_437_439-a_b_i_n_v_z-e_g_i.xml
@@ -213,7 +213,7 @@
         <af peripheral="Adc2" name="Channel7" type="analog"/>
       </gpio>
       <gpio port="A" id="8">
-        <af id="0" peripheral="MCO1" type="out"/>
+        <af id="0" peripheral="ClockOutput1" type="out"/>
         <af id="1" peripheral="Timer1" name="Channel1"/>
         <af id="4" peripheral="I2cMaster3" name="Scl" type="out"/>
         <af id="7" peripheral="Uart1" name="Ck" type="out"/>
@@ -394,7 +394,7 @@
         <af id="8" peripheral="UartSpiMaster6" name="Sck" type="out"/>
       </gpio>
       <gpio port="C" id="9">
-        <af id="0" peripheral="MCO2" type="out"/>
+        <af id="0" peripheral="ClockOutput2" type="out"/>
         <af id="2" peripheral="Timer3" name="Channel4"/>
         <af id="3" peripheral="Timer8" name="Channel4"/>
         <af id="4" peripheral="I2cMaster3" name="Sda"/>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f446-m_r_v_z-c_e.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f446-m_r_v_z-c_e.xml
@@ -194,7 +194,7 @@
         <af peripheral="Adc2" name="Channel7" type="analog"/>
       </gpio>
       <gpio port="A" id="8">
-        <af id="0" peripheral="MCO1" type="out"/>
+        <af id="0" peripheral="ClockOutput1" type="out"/>
         <af id="1" peripheral="Timer1" name="Channel1"/>
         <af id="4" peripheral="I2cMaster3" name="Scl" type="out"/>
         <af id="7" peripheral="Uart1" name="Ck" type="out"/>
@@ -394,7 +394,7 @@
         <af id="8" peripheral="UartSpiMaster6" name="Sck" type="out"/>
       </gpio>
       <gpio port="C" id="9">
-        <af id="0" peripheral="MCO2" type="out"/>
+        <af id="0" peripheral="ClockOutput2" type="out"/>
         <af id="2" peripheral="Timer3" name="Channel4"/>
         <af id="3" peripheral="Timer8" name="Channel4"/>
         <af id="4" peripheral="I2cMaster3" name="Sda"/>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f469_479-a_b_i_n-e_g_i.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f469_479-a_b_i_n-e_g_i.xml
@@ -208,7 +208,7 @@
         <af peripheral="Adc2" name="Channel7" type="analog"/>
       </gpio>
       <gpio port="A" id="8">
-        <af id="0" peripheral="MCO1" type="out"/>
+        <af id="0" peripheral="ClockOutput1" type="out"/>
         <af id="1" peripheral="Timer1" name="Channel1"/>
         <af id="4" peripheral="I2cMaster3" name="Scl" type="out"/>
         <af id="7" peripheral="Uart1" name="Ck" type="out"/>
@@ -391,7 +391,7 @@
         <af id="8" peripheral="UartSpiMaster6" name="Sck" type="out"/>
       </gpio>
       <gpio port="C" id="9">
-        <af id="0" peripheral="MCO2" type="out"/>
+        <af id="0" peripheral="ClockOutput2" type="out"/>
         <af id="2" peripheral="Timer3" name="Channel4"/>
         <af id="3" peripheral="Timer8" name="Channel4"/>
         <af id="4" peripheral="I2cMaster3" name="Sda"/>

diff --git a/src/xpcc/architecture/platform/devices/stm32/stm32f745_746_756-b_i_n_v_z-e_g.xml b/src/xpcc/architecture/platform/devices/stm32/stm32f745_746_756-b_i_n_v_z-e_g.xml
@@ -219,7 +219,7 @@
         <af peripheral="Adc2" name="Channel7" type="analog"/>
       </gpio>
       <gpio port="A" id="8">
-        <!--<af id="0" peripheral="MCO1" type="out"/>-->
+        <!--<af id="0" peripheral="ClockOutput1" type="out"/>-->
         <af id="1" peripheral="Timer1" name="Channel1"/>
         <af id="3" peripheral="Timer8" name="BreakIn" type="in"/>
         <af id="4" peripheral="I2cMaster3" name="Scl" type="out"/>
@@ -409,7 +409,7 @@
         <af id="8" peripheral="UartSpiMaster6" name="Sck" type="out"/>
       </gpio>
       <gpio port="C" id="9">
-        <!--<af id="0" peripheral="MCO2" type="out"/>-->
+        <!--<af id="0" peripheral="ClockOutput2" type="out"/>-->
         <af id="2" peripheral="Timer3" name="Channel4"/>
         <af id="3" peripheral="Timer8" name="Channel4"/>
         <af id="4" peripheral="I2cMaster3" name="Sda"/>

diff --git a/src/xpcc/architecture/platform/driver/clock/generic/common_clock.hpp b/src/xpcc/architecture/platform/driver/clock/generic/common_clock.hpp
@@ -84,12 +84,18 @@ Hz(int f)  { return (f == HzDontCare)? HzDontCare : (f / Hz1); }
 enum class
 StartupError : uint8_t
 {
-	None = 0,				// all went well
-	InternalClock = 1,		// was not able to start the internal clock
-	ExternalClock = 2,		// was not able to start the external clock
-	ExternalCrystal = 3,	// was not able to start the external oscillator
-	Pll = 4,				// was not able to start the PLL
-	SystemClock = 5,		// was not able to switch system clock input
+	None = 0,
+	InternalClock,
+	ExternalClock,
+	ExternalCrystal,
+	LowSpeedInternalClock,
+	LowSpeedExternalClock,
+	LowSpeedExternalCrystal,
+	Pll,
+	SystemClock,
+	ClockOutput,
+	RealTimeClock,
+	WatchdogClock
 };
 
 extern uint32_t ATTRIBUTE_FASTDATA fcpu;

diff --git a/src/xpcc/architecture/platform/driver/clock/generic/static.macros b/src/xpcc/architecture/platform/driver/clock/generic/static.macros
@@ -63,7 +63,15 @@ public:
 	static StartupError
 	enable(const uint32_t waitCycles = 1500)
 	{
-		if (!ClockTree::enableSource(ClockTree::ClockSource::{{ s.name }}, kHz(outputFrequency), waitCycles))
+%% if target is lpc
+	%%	if s.fixedFrequency|length > 0
+		if (!ClockControl::enable{{ s.name }}({{ s.fixedFrequency }}/1000, waitCycles))
+	%% else
+		if (!ClockControl::enable{{ s.name }}(InputFrequency/1000, waitCycles))
+	%% endif
+%% else
+		if (!ClockControl::enable{{ s.name }}(waitCycles))
+%% endif
 			return StartupError::{{ s.name }};
 		return StartupError::None;
 	}
@@ -105,7 +113,7 @@ public:
 		if (err != StartupError::None) return err;
 		return PllSetup<InputFrequency,
 				OutputFrequency{{ template }},
-				ClockTree::PllSource::{{ src.name }}>::enable();
+				ClockControl::PllSource::{{ src.name }}>::enable();
 	}
 	static constexpr int
 	outputFrequency = OutputFrequency;
@@ -176,8 +184,8 @@ public:
 	{
 		StartupError err =  {{ src.name }}<{{ template }}>::enable(waitCycles);
 		if (err != StartupError::None) return err;
-		if(ClockTree::switch{{ s.name }}To(
-				ClockTree::{{ s.name }}Source::{{ src.name }}, waitCycles))
+		if(ClockControl::enable{{ s.name }}(
+				ClockControl::{{ s.name }}Source::{{ src.name }}, waitCycles))
 			return StartupError::None;
 		return StartupError::{{ src.name }};
 	}
@@ -200,18 +208,25 @@ public:
 	};
 
 	static ALWAYS_INLINE void
-	setDivision(Division d)
+	setDivision(Division)
 	{
-		ClockTree::set{{ o.name }}Division(static_cast<int>(d));
+		//ClockControl::enable{{ o.name }}(static_cast<int>(d));
 	}
 %% endif
 	// Connect Functions
 %% for src in o.sources
 	static ALWAYS_INLINE void
+%% if target is stm32f2 or target is stm32f4
+	connect(::{{type_id_namespace}}::TypeId::{{ src.name }} /* t */, uint8_t div = 1)
+	{
+		ClockControl::enable{{ o.name }}(ClockControl::{{ o.name }}Source::{{ src.name }}, div);
+	}
+%% else
 	connect(::{{type_id_namespace}}::TypeId::{{ src.name }} /* t */)
 	{
-		ClockTree::connectTo{{ o.name }}(ClockTree::{{ o.name }}Source::{{ src.name }});
+		ClockControl::enable{{ o.name }}(ClockControl::{{ o.name }}Source::{{ src.name }});
 	}
+%% endif
 %% endfor
 };
 %% endmacro
diff --git a/src/xpcc/architecture/platform/driver/clock/lpc/clock.cpp.in b/src/xpcc/architecture/platform/driver/clock/lpc/clock.cpp.in
@@ -59,40 +59,37 @@
 
 // ----------------------------------------------------------------------------
 bool
-xpcc::lpc::ClockTree::enableSource(ClockSource src, uint32_t f_kHz, uint32_t /*waitCycles*/)
+xpcc::lpc::ClockControl::enableInternalClock(uint32_t, uint32_t)
 {
-	if (src == ClockSource::InternalClock) {
-		return true;	// InternalClock is on by default (PDRUNCFG: IRC_PD)
-	}
-	else if (src == ClockSource::ExternalClock) {
-		LPC_SYSCON->PDRUNCFG &= ~PDRUNCFG_SYSOSC_PD;	// powerup
-		LPC_SYSCON->SYSOSCCTRL |= SYSOSCCTRL_BYPASS;	// enable bypass
-	}
-	else if(src == ClockSource::ExternalCrystal) {
-		LPC_SYSCON->PDRUNCFG &= ~PDRUNCFG_SYSOSC_PD;	// powerup
-		LPC_SYSCON->SYSOSCCTRL &= ~SYSOSCCTRL_BYPASS;	// do not bypass
-		if(f_kHz >= u32kHz(MHz1) && f_kHz <= u32kHz(MHz17)) {
-			LPC_SYSCON->SYSOSCCTRL &= ~SYSOSCCTRL_FREQRANGE; // 1-20MHz
-		}
-		else if (f_kHz >= u32kHz(MHz17) && f_kHz <= u32kHz(MHz25)) {
-			LPC_SYSCON->SYSOSCCTRL |= SYSOSCCTRL_FREQRANGE; // 15-25MHz
-		}
-		else {
-			return false;	// should not get here
-		}
-	}
-	else {
-		return false;	// should not get here
-	}
+	return true;
+}
 
-	// TODO: maybe add wait loop (especially for for oscillator??)
+bool
+xpcc::lpc::ClockControl::enableExternalClock(uint32_t, uint32_t)
+{
+	LPC_SYSCON->PDRUNCFG &= ~PDRUNCFG_SYSOSC_PD;	// powerup
+	LPC_SYSCON->SYSOSCCTRL |= SYSOSCCTRL_BYPASS;	// enable bypass
+	return true;
+}
 
+bool
+xpcc::lpc::ClockControl::enableExternalCrystal(uint32_t f_kHz, uint32_t)
+{
+	LPC_SYSCON->PDRUNCFG &= ~PDRUNCFG_SYSOSC_PD;	// powerup
+	LPC_SYSCON->SYSOSCCTRL &= ~SYSOSCCTRL_BYPASS;	// do not bypass
+	if(f_kHz >= u32kHz(MHz1) && f_kHz <= u32kHz(MHz17)) {
+		LPC_SYSCON->SYSOSCCTRL &= ~SYSOSCCTRL_FREQRANGE; // 1-20MHz
+	}
+	else if (f_kHz >= u32kHz(MHz17) && f_kHz <= u32kHz(MHz25)) {
+		LPC_SYSCON->SYSOSCCTRL |= SYSOSCCTRL_FREQRANGE; // 15-25MHz
+	}
+	else return false;	// should not get here
 	return true;
 }
 
 // ----------------------------------------------------------------------------
-void
-xpcc::lpc::ClockTree::enablePll(PllSource source, uint8_t pllM, uint8_t pllP)
+bool
+xpcc::lpc::ClockControl::enablePll(PllSource source, uint8_t pllM, uint8_t pllP)
 {
 	// SYSPLLCLKSEL
 	LPC_SYSCON->SYSPLLCLKSEL = (LPC_SYSCON->SYSPLLCLKSEL & 0b11)
@@ -104,11 +101,12 @@ xpcc::lpc::ClockTree::enablePll(PllSource source, uint8_t pllM, uint8_t pllP)
 	LPC_SYSCON->SYSPLLCTRL = (0x1f & (pllM-1)) | (0x60 & pllP);
 	LPC_SYSCON->PDRUNCFG &= ~PDRUNCFG_SYSPLL_PD;	// power up pll
 	while (!(LPC_SYSCON->SYSPLLSTAT & SYSPLLSTAT_LOCK));// wait for pll to be locked
+	return true;
 }
 
 // ----------------------------------------------------------------------------
 bool
-xpcc::lpc::ClockTree::switchSystemClockTo(SystemClockSource src, uint32_t /*waitCycles*/)
+xpcc::lpc::ClockControl::enableSystemClock(SystemClockSource src, uint32_t /*waitCycles*/)
 {
 	LPC_SYSCON->MAINCLKSEL = static_cast<uint32_t>(src);
 	LPC_SYSCON->MAINCLKUEN = 0x01;	// toggle update enable register