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An implementation of Risc-V and my first 32-bit processor.

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Superseded by Boa³²

Axo32 has critical problems in the memory architecture that essentially require a re-design but because I already got code execution, I decided to keep it around.

Axolotl³²: An implementation of RV32

Axolotl³² is my first implementation of an ISA not of my own design. The main reason for this project is that I want to have a C compiler for my CPU projects, and Risc-V is an open-source royalty-free architecture with existing open-source compilers.

Also, I'm like, totally going to make a simple RTOS for it.

Specifications

Axolotl³² implements RV32 from the Risc-V specification:

I may play around with non-standard extensions later, but this will start as strictly RV32I.

License

Creative Commons License
This work ("Axolotl³²") is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.

Corporate entities and for-profit organisations will need to contact Julian Scheffers (julian@scheffers.net) to negotiate a commercial license.

Disclaimer: I do not own the trademark "Risc-V" nor do I claim to do so. Axolotl³² implements the Risc-V ISA, but it is not "the" Risc-V processor.

Is this restrictive license necessary?

Yes.

Engineering a CPU is an incredible amount of work. These types of projects take years to complete so, unlike my other projects, Axolotl³² is a non-commercially licensed intelectual property.

Don't worry, if you're reading this chances are you're not running a for-profit organisation, so name me if you use it but most importantly: enjoy!

On the off chance that a for-profit organisation (that likes CPUs) reads this, hire me ;)

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