This is a VHDL project for a 800*600 VGA displayer.
This project has been tested on the STEP-MXO2 Development Board (see this page for information). Some useful information is listed below.
Device family: Lattice MachXO2
Device: LCMXO2-4000HC
IDE & synthesis tool: Lattice Diamond
This VGA display project can generate a VGA signal of 800*600 resolution that can be displayed on most monitors you can find on the market. You can swithch among three display modes and change the displayed color on screen by two buttons.
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Vertical color bands
Display 8 vertical color bands (RED, GREEN, BLUE, YELLOW, MAGENTA, CYAN1, WHITE, BLACK) on screen. You can left-shift these color bands by pressing button 2.
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Horizonal color bands
Display 8 horizonal color bands (RED, GREEN, BLUE, YELLOW, MAGENTA, CYAN1, WHITE, BLACK) on screen. You can up-shift these color bands by pressing button 2.
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Letter display
Display a message of "I ❤ VHDL" on the screen. The color of the words can be changed by pressing button 2.
I've designed two physical buttons to control the system.
- The button 1, specified as state_inp in vga_main.vhd, can switch this system among 3 states listed above.
- The button 2, specified as shift_inp in vga_mian.vhd, can change the color displayed on the screen.
This project include 5 VHDL files and 3 Python files. Their functions are specified below.
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vga_main.vhd
The top module of this project. It create instances of other modules and connects them together.
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vga_disp.vhd
Inculudes vga_disp module. It works at 40 MHz clock frequency created by the pll_module in pll_module.vhd. It reads button infromation from two jitter-eliminate button (button_as_switch_nodist module in button_nodist.vhd), changes the current display mode and switches the color display.
A testbench is created for this module, written in vga_tb.vhd.
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pll_mocule.vhd
Includes pll_module module. This module uses an onboard PLL to shift the 12MHz onboard oscillator frequency to the desired 40MHz working frequency for 800*600 VGA display.
The module was automatically generated by IPExpress, which is inluded in Lattice Diamond Toolchain.
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button_nodist.vhd
This button_as_switch_nodist module eliminates jitter caused by physical switches. It reads the signal input and changes the voltage output level whenever a valid signal is detected.
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vga_tb.vhd
A Testbench file for vga_disp module in vga_disp.vhd.
Python is used to generate the display range of "I ❤ VHDL".
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heart_generator.py
Generates the display range of heart (❤) on the screen.
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V_generator.py
Generate the display range of letter V on the screen.
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D_generator.py
Generate the display range of letter D on the screen.
1.0 2017-06-01 initial commit