single UARTA ok in all 3 modes

rokath · Mar 5, 2023 · 6c4c346 · 6c4c346
1 parent c80ed36
commit 6c4c346
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Showing 6 changed files with 128 additions and 52 deletions.
diff --git a/src/box/core.c b/src/box/core.c
@@ -239,7 +239,7 @@ void TriceOut( uint32_t* tb, size_t tLen ){
 			  #endif
 			  TriceWriteDeviceUartB( enc, encLen );
     #endif
-    #if defined(TRICE_RTT0) && !defined(TRICE_DOUBLE_BUFFER) && !defined(TRICE_STREAM_BUFFER) // only when RTT0 is alone
+    #if defined(TRICE_RTT0) // && !defined(TRICE_DOUBLE_BUFFER) && !defined(TRICE_STREAM_BUFFER) // only when RTT0 is alone
 			  #if defined(TRICE_RTT0_MIN_ID) && defined(TRICE_RTT0_MAX_ID)
 				if( (TRICE_RTT0_MIN_ID < triceID) && (triceID < TRICE_RTT0_MAX_ID) )
 			  #endif

diff --git a/test/MDK-ARM_STM32F030R8/Core/Inc/triceConfig.h b/test/MDK-ARM_STM32F030R8/Core/Inc/triceConfig.h
@@ -50,7 +50,7 @@ extern "C" {
 //! TRICE_STREAM_BUFFER:
 //! \li Stream Buffering output to UART. Needs less buffer memory for the price of being a bit slower.
 //! \li Command line similar to: `trice log -p COM1 -baud 115200`
-#define TRICE_MODE TRICE_STACK_BUFFER 
+#define TRICE_MODE TRICE_STREAM_BUFFER 
 
 //! TRICE_SINGLE_MAX_SIZE is used to truncate long dynamically generated strings and to detect the need of a stream buffer wrap.
 //! Be careful with this value: When using 12 64-bit values with a 64-bit stamp the trice size is 2 + 8 + 2 + 12*8 = 108 bytes
@@ -96,12 +96,12 @@ extern "C" {
 // 
 
 //! Enable and set channel number for SeggerRTT usage. Only channel 0 works right now for some reason.
-#define TRICE_RTT0 0 // comment out, if you do not use RTT
+//#define TRICE_RTT0 0 // comment out, if you do not use RTT
 //#define TRICE_RTT0_MIN_ID 1           //!< TRICE_RTT0_MIN_ID is the smallest ID transferred to RTT0.
 //#define TRICE_RTT0_MAX_ID ((1<<14)-1) //!< TRICE_RTT0_MAX_ID is the biggest  ID transferred to RTT0.
 
 //! Enable and set UARTA for serial output.
-//#define TRICE_UARTA USART2 // comment out, if you do not use TRICE_UARTA
+#define TRICE_UARTA USART2 // comment out, if you do not use TRICE_UARTA
 #ifdef TRICE_UARTA
 //#define TRICE_UARTA_MIN_ID 1           //!< TRICE_UARTA_MIN_ID is the smallest ID transferred to UARTA.
 //#define TRICE_UARTA_MAX_ID ((1<<14)-1) //!< TRICE_UARTA_MAX_ID is the biggest  ID transferred to UARTA.
@@ -179,10 +179,19 @@ extern "C" {
 ///////////////////////////////////////////////////////////////////////////////
 // Headline info
 //
+#if TRICE_MODE == TRICE_STACK_BUFFER
+#define LOG_TRICE_MODE TRice( iD( 2545), "s:     NUCLEO-F030R8  STACK_BUFFER MODE     \n" );
+#elif TRICE_MODE == TRICE_STREAM_BUFFER
+#define LOG_TRICE_MODE TRice( iD( 2171), "s:     NUCLEO-F030R8 STREAM_BUFFER MODE     \n" );
+#elif TRICE_MODE == TRICE_DOUBLE_BUFFER
+#define LOG_TRICE_MODE TRice( iD( 3758), "s:     NUCLEO-F030R8 DOUBLE_BUFFER MODE     \n" );
+#else
+#error
+#endif
 
 //! This is usable as the very first trice sequence after restart. Adapt and use it or ignore it.
 #define TRICE_HEADLINE \
-    TRice( iD( 7037), "s:     NUCLEO-F030R8     TRICE_MODE %3u     \n", TRICE_MODE ); \
+    LOG_TRICE_MODE \
     trice( iD( 7746), "s:     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~     \n" ); \
     trice( iD( 2661), "s:     " ); \
     TriceLogBufferInfo(); \

diff --git a/test/MDK-ARM_STM32F030R8/Core/Src/main.c b/test/MDK-ARM_STM32F030R8/Core/Src/main.c
@@ -112,7 +112,7 @@ int main(void)
     LL_USART_EnableIT_RXNE(TRICE_UARTB); 
     #endif
 
-    trice( iD( 1398), "warning:Hello! 👋🙂 \n\n" );
+    trice( iD( 1728), "w: Hello! 👋🙂 \n\n" );
     loop++;
 
     TRICE_HEADLINE;

diff --git a/test/MDK-ARM_STM32F030R8/MDK-ARM/MDK-ARM_STM32F030R8.uvprojx b/test/MDK-ARM_STM32F030R8/MDK-ARM/MDK-ARM_STM32F030R8.uvprojx
@@ -10,14 +10,14 @@
       <TargetName>MDK-ARM_STM32F030R8</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6180000::V6.18::ARMCLANG</pCCUsed>
+      <pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>STM32F030R8Tx</Device>
           <Vendor>STMicroelectronics</Vendor>
-          <PackID>Keil.STM32F0xx_DFP.2.1.1</PackID>
-          <PackURL>https://www.keil.com/pack/</PackURL>
+          <PackID>Keil.STM32F0xx_DFP.2.1.0</PackID>
+          <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000-0x20001FFF) IROM(0x8000000-0x800FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0") TZ</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
@@ -186,7 +186,6 @@
             <RvdsVP>0</RvdsVP>
             <RvdsMve>0</RvdsMve>
             <RvdsCdeCp>0</RvdsCdeCp>
-            <nBranchProt>0</nBranchProt>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>