add-rockchip-iep-driver(:1)

Original-Subject: [ARCHEOLOGY] rk322x: bump edge kernel to 5.14, u-boot to 2021.07 (#3133)
> X-Git-Archeology: - Revision 4425589e15c3b1593731703c379df0fa1b4432fb: armbian/build@4425589
> X-Git-Archeology:   Date: Thu, 09 Sep 2021 22:59:12 +0200
> X-Git-Archeology:   From: Paolo <paolo.sabatino@gmail.com>
> X-Git-Archeology:   Subject: rk322x: bump edge kernel to 5.14, u-boot to 2021.07 (#3133)
> X-Git-Archeology: 
> X-Git-Archeology: - Revision a1d044de8e0bb6ca504386bc31f5615a9d169067: armbian/build@a1d044d
> X-Git-Archeology:   Date: Tue, 12 Oct 2021 15:59:01 +0200
> X-Git-Archeology:   From: Paolo Sabatino <paolo.sabatino@gmail.com>
> X-Git-Archeology:   Subject: rockchip: update support for edge kernel 5.14
> X-Git-Archeology: 
> X-Git-Archeology: - Revision 682e4085ab8faa278db21a41ed23a6b12f8868ea: armbian/build@682e408
> X-Git-Archeology:   Date: Thu, 21 Oct 2021 22:55:25 +0200
> X-Git-Archeology:   From: Paolo <paolo.sabatino@gmail.com>
> X-Git-Archeology:   Subject: rockchip64: add IEP driver (#3215)
> X-Git-Archeology: 
> X-Git-Archeology: - Revision 597d2dac11f00d9070a4e49d6bad1b2244e36cb3: armbian/build@597d2da
> X-Git-Archeology:   Date: Sat, 28 May 2022 07:56:22 +0200
> X-Git-Archeology:   From: Jianfeng Liu <liujianfeng1994@gmail.com>
> X-Git-Archeology:   Subject: update rockchip64-edge to 5.18 (#3814)
> X-Git-Archeology: 
> X-Git-Archeology: - Revision 92f1a22d76b987afa7ba555d5b509adc51d689e7: armbian/build@92f1a22
> X-Git-Archeology:   Date: Fri, 16 Dec 2022 13:38:13 +0100
> X-Git-Archeology:   From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
> X-Git-Archeology:   Subject: Re-add rockchip64 6.0 patches (#4575)
> X-Git-Archeology: 
X-Armbian: Patch-File: add-rockchip-iep-driver
X-Armbian: Patch-File-Counter: 1
X-Armbian: Patch-Rel-Directory: patch/kernel/archive/rockchip64-6.1
X-Armbian: Patch-Type: kernel
X-Armbian: Patch-Root-Type: core
X-Armbian: Patch-Sub-Type: common
X-Armbian: Original-Subject: [ARCHEOLOGY] rk322x: bump edge kernel to 5.14, u-boot to 2021.07 (#3133)

Documentation/devicetree/bindings/media/rockchip-iep.yaml

@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/rockchip-iep.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip Image Enhancement Processor (IEP)
+
+description:
+    Rockchip IEP supports various image enhancement operations for YUV and RGB domains.
+    Deinterlacing, spatial and temporal sampling noise reduction are supported by the
+    YUV block. Gamma adjustment, edge enhancement, detail enhancement are supported in
+    the RGB block. Brightness, Saturation, Contrast, Hue adjustment is supported for
+    both domains. Furthermore it supports converting RGB to YUV / YUV to RGB.
+
+maintainers:
+  - Heiko Stuebner <heiko@sntech.de>
+
+properties:
+  compatible:
+    oneOf:
+      - const: rockchip,rk3228-iep
+      - items:
+          - enum:
+              - rockchip,rk3288-iep
+              - rockchip,rk3328-iep
+              - rockchip,rk3368-iep
+              - rockchip,rk3399-iep
+          - const: rockchip,rk3228-iep
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: axi
+      - const: ahb
+
+  power-domains:
+    maxItems: 1
+
+  iommus:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/rk3228-cru.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/power/rk3228-power.h>
+    iep: iep@20070000 {
+      compatible = "rockchip,rk3228-iep";
+      reg = <0x20070000 0x800>;
+      interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+      clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+      clock-names = "axi", "ahb";
+      iommus = <&iep_mmu>;
+      power-domains = <&power RK3228_PD_VIO>;
+    };

arch/arm/boot/dts/rk3288.dtsi

@@ -984,14 +984,25 @@
 		reset-names = "crypto-rst";
 	};
 
+	iep: iep@ff90000 {
+		compatible = "rockchip,rk3288-iep", "rockchip,rk3228-iep";
+		reg = <0x0 0xff900000 0x0 0x800>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "iep";
+		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+		clock-names = "axi", "ahb";
+		power-domains = <&power RK3288_PD_VIO>;
+		iommus = <&iep_mmu>;
+	};
+
 	iep_mmu: iommu@ff900800 {
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff900800 0x0 0x40>;
 		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3288_PD_VIO>;
 		#iommu-cells = <0>;
-		status = "disabled";
 	};
 
 	isp_mmu: iommu@ff914000 {

arch/arm64/boot/dts/rockchip/rk3328.dtsi

@@ -720,6 +720,28 @@
 		status = "disabled";
 	};
 
+	iep: iep@ff3a0000 {
+		compatible = "rockchip,rk3328-iep", "rockchip,rk3228-iep";
+		reg = <0x0 0xff3a0000 0x0 0x800>;
+		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "iep";
+		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+		clock-names = "axi", "ahb";
+		power-domains = <&power RK3328_PD_VIDEO>;
+		iommus = <&iep_mmu>;
+	};
+
+	iep_mmu: iommu@ff3a0800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff3a0800 0x0 0x40>;
+		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "iep_mmu";
+		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3328_PD_VIDEO>;
+		#iommu-cells = <0>;
+	};
+
 	hdmi: hdmi@ff3c0000 {
 		compatible = "rockchip,rk3328-dw-hdmi";
 		reg = <0x0 0xff3c0000 0x0 0x20000>;

arch/arm64/boot/dts/rockchip/rk3399.dtsi

@@ -1357,12 +1357,25 @@
 		#iommu-cells = <0>;
 	};
 
+
+	iep: iep@ff670000 {
+		compatible = "rockchip,rk3399-iep", "rockchip,rk3228-iep";
+		reg = <0x0 0xff670000 0x0 0x800>;
+		interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "iep";
+		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+		clock-names = "axi", "ahb";
+		power-domains = <&power RK3399_PD_IEP>;
+		iommus = <&iep_mmu>;
+	};
+
 	iep_mmu: iommu@ff670800 {
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff670800 0x0 0x40>;
 		interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3399_PD_IEP>;
 		#iommu-cells = <0>;
 		status = "disabled";
 	};

drivers/media/platform/rockchip/Kconfig

@@ -4,3 +4,4 @@ comment "Rockchip media platform drivers"
 
 source "drivers/media/platform/rockchip/rga/Kconfig"
 source "drivers/media/platform/rockchip/rkisp1/Kconfig"
+source "drivers/media/platform/rockchip/iep/Kconfig"

drivers/media/platform/rockchip/Makefile

@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0-only
 obj-y += rga/
 obj-y += rkisp1/
+obj-y += iep/

drivers/media/platform/rockchip/iep/Kconfig

@@ -0,0 +1,13 @@
+config VIDEO_ROCKCHIP_IEP
+	tristate "Rockchip Image Enhancement Processor"
+	depends on VIDEO_DEV && VIDEO_V4L2
+	depends on ARCH_ROCKCHIP || COMPILE_TEST
+	select VIDEOBUF2_DMA_CONTIG
+	select V4L2_MEM2MEM_DEV
+	help
+	  This is a v4l2 driver for Rockchip Image Enhancement Processor (IEP)
+	  found in most Rockchip RK3xxx SoCs.
+	  Rockchip IEP supports various enhancement operations for RGB and YUV
+	  images. The driver currently implements YUV deinterlacing only.
+	  To compile this driver as a module, choose M here: the module
+	  will be called rockchip-iep

drivers/media/platform/rockchip/iep/Makefile

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+rockchip-iep-objs := iep.o
+
+obj-$(CONFIG_VIDEO_ROCKCHIP_IEP) += rockchip-iep.o