PPU LLVM: Optimize altivec FMA with 0 addend #8013
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Nekotekina
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Apr 11, 2020
elad335
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Apr 11, 2020
elad335
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Apr 11, 2020
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elad335
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- When VMADDFP and VNMSUBFP are used with a constant addend of 0, they can be simplified into a single floating multiply
elad335
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One quirk of the altivec ISA is that only floating multiply add (FMA) and floating add instructions are provided. To execute a floating multiply without an add you had to execute an FMA with an addend of 0.
Let's detect this case and emit only a floating multiply when a constant addend of 0 is used.
On skylake the gains are very small, since FMA and floating multiply ops are executed with the same latency, but on ryzen floating multiply has lower latency than FMA, so it may benefit more. Anything without native FMA support should also benefit plenty.