[RISC-V] Support GP-relative relocations

These relocations are use for embedded programming and are probably not useful for mold, but we want them for the sake of completeness.
rui314 · Sep 26, 2023 · ac3ee91 · ac3ee91
1 parent 18df821
commit ac3ee91
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Showing 2 changed files with 22 additions and 2 deletions.
diff --git a/elf/arch-riscv.cc b/elf/arch-riscv.cc
@@ -259,6 +259,7 @@ static inline bool is_hi20(const ElfRel<E> &rel) {
 template <>
 void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
   std::span<const ElfRel<E>> rels = get_rels(ctx);
+  u64 GP = ctx.__global_pointer ? ctx.__global_pointer->get_addr(ctx) : 0;
 
   ElfRel<E> *dynrel = nullptr;
   if (ctx.reldyn)
@@ -375,7 +376,9 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       write_utype(loc, S + A - P);
       break;
     case R_RISCV_PCREL_LO12_I:
-    case R_RISCV_PCREL_LO12_S: {
+    case R_RISCV_PCREL_LO12_S:
+    case R_RISCV_GPREL_LO12_I:
+    case R_RISCV_GPREL_LO12_S: {
       i64 idx2 = find_paired_reloc();
       const ElfRel<E> &rel2 = rels[idx2];
       Symbol<E> &sym2 = *file.symbols[rel2.r_sym];
@@ -399,11 +402,15 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       case R_RISCV_PCREL_HI20:
         val = S + A - P;
         break;
+      case R_RISCV_GPREL_HI20:
+        val = S + A - GP;
+        break;
       default:
         unreachable();
       }
 
-      if (rel.r_type == R_RISCV_PCREL_LO12_I)
+      if (rel.r_type == R_RISCV_PCREL_LO12_I ||
+          rel.r_type == R_RISCV_GPREL_LO12_I)
         write_itype(loc, val);
       else
         write_stype(loc, val);
@@ -560,6 +567,10 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       check(S + A - P, -(1 << 11), 1 << 11);
       write_cjtype(loc, S + A - P);
       break;
+    case R_RISCV_GPREL_HI20:
+      check(S + A - GP, -(1LL << 31), 1LL << 31);
+      write_utype(loc, S + A - GP);
+      break;
     case R_RISCV_SUB6:
       *loc = (*loc & 0b1100'0000) | ((*loc - S - A) & 0b0011'1111);
       break;
@@ -761,6 +772,10 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
     case R_RISCV_TPREL_ADD:
       check_tlsle(ctx, sym, rel);
       break;
+    case R_RISCV_GPREL_HI20:
+      if (ctx.arg.shared)
+        Fatal(ctx) << *this << ": R_RISCV_GPREL_HI20 may not be used with -shared";
+      break;
     case R_RISCV_BRANCH:
     case R_RISCV_JAL:
     case R_RISCV_PCREL_LO12_I:
@@ -781,6 +796,8 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
     case R_RISCV_ALIGN:
     case R_RISCV_RVC_BRANCH:
     case R_RISCV_RVC_JUMP:
+    case R_RISCV_GPREL_LO12_I:
+    case R_RISCV_GPREL_LO12_S:
     case R_RISCV_RELAX:
     case R_RISCV_SUB6:
     case R_RISCV_SET6:

diff --git a/elf/elf.h b/elf/elf.h
@@ -774,6 +774,9 @@ enum : u32 {
   R_RISCV_RVC_BRANCH = 44,
   R_RISCV_RVC_JUMP = 45,
   R_RISCV_RVC_LUI = 46,
+  R_RISCV_GPREL_LO12_I = 47,
+  R_RISCV_GPREL_LO12_S = 48,
+  R_RISCV_GPREL_HI20 = 49,
   R_RISCV_RELAX = 51,
   R_RISCV_SUB6 = 52,
   R_RISCV_SET6 = 53,