CANv1: fix for GD32 devices

On GD32 CAN_TSTAT bits [25:24] has another meaning vs STM32:
"These bits are the number of the Tx FIFO mailbox in which the
frame will be transmitted if at least one mailbox is empty."
While on STM32:
"In case at least one transmit mailbox is free, the code value
is equal to the number of the next transmit mailbox free."
So to determine free mailbox we need to check TMEx bits on GD32.

os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c

@@ -818,7 +818,24 @@ void can_lld_transmit(CANDriver *canp,
   /* Pointer to a free transmission mailbox.*/
   switch (mailbox) {
   case CAN_ANY_MAILBOX:
-    tmbp = &canp->can->sTxMailBox[(canp->can->TSR & CAN_TSR_CODE) >> 24];
+    if ((DBGMCU->IDCODE >> 16) == 0x1001) {
+      /* real STM32 */
+      tmbp = &canp->can->sTxMailBox[(canp->can->TSR & CAN_TSR_CODE) >> 24];
+    } else {
+      int n;
+      /* GD32 */
+      if ((canp->can->TSR & CAN_TSR_TME0) == CAN_TSR_TME0)
+        n = 0;
+      else if ((canp->can->TSR & CAN_TSR_TME1) == CAN_TSR_TME1)
+        n = 1;
+      else if ((canp->can->TSR & CAN_TSR_TME2) == CAN_TSR_TME2)
+        n = 2;
+      else {
+        /* silence? */
+        return;
+      }
+      tmbp = &canp->can->sTxMailBox[n];
+    }
     break;
   case 1:
     tmbp = &canp->can->sTxMailBox[0];