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Propose to release a version riscv v0.8.1 #112

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merged 1 commit into from
Oct 6, 2022

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luojia65
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@luojia65 luojia65 commented Oct 6, 2022

The riscv crate includes an important fix (#107) where the RustSBI community would leverage the use of. However, the latest release v0.8.0 did not include this fix. In this pull request we want to propose to release a new version of riscv crate to include at least this fix, so that RustSBI community would write correct implemenations based on this crate.

Notes to CHANGELOG.md: the release date 2022-10-06 can always be changed.

r? @Disasm

@luojia65 luojia65 requested a review from a team as a code owner October 6, 2022 08:37
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LGTM

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almindor commented Oct 6, 2022

bors r+

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bors bot commented Oct 6, 2022

@bors bors bot merged commit 828d82f into rust-embedded:master Oct 6, 2022
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almindor commented Oct 6, 2022

@luojia65 0.8.1 is now released on crates.io

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Disasm commented Oct 6, 2022

This should be v0.9.0 release since it introduces a breaking change: 9418b6c

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almindor commented Oct 6, 2022

This should be v0.9.0 release since it introduces a breaking change: 9418b6c

Hmm good point. Wasn't that broken to begin with though? In other words anyone who used those methods would just get an error?

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mip is WARL, and as far as I can tell the spec doesn't say that an attempt to write to a read-only bit on these registers would cause an exception. I tested this on a HiFive Inventor and it seems to just ignore it, which is what I'd expect to happen in this case.

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almindor commented Oct 6, 2022

mip is WARL, and as far as I can tell the spec doesn't say that an attempt to write to a read-only bit on these registers would cause an exception. I tested this on a HiFive Inventor and it seems to just ignore it, which is what I'd expect to happen in this case.

Ah ok, let me punch this to 0.9 then and yank 0.8.1 @Disasm agreed?

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Disasm commented Oct 7, 2022

@almindor sounds good, thank you!

bors bot added a commit that referenced this pull request Oct 7, 2022
113: bump version to v0.9.0 due to breaking changes r=Disasm a=almindor

As per discussion on #112 we want to release `v0.9.0` and yank `v0.8.1` since the removals were a breaking change.

Co-authored-by: Ales Katona <ales@katona.me>
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almindor commented Oct 7, 2022

We should be good now

@luojia65 luojia65 deleted the propose-0.8.1 branch October 7, 2022 12:53
luojia65 added a commit to luojia65/esp-hal that referenced this pull request Oct 8, 2022
The `riscv` crate has introduced several fixes which newer users would take advantage of (rust-embedded/riscv#112)
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4 participants