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raw_read_write
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burrbull committed Jun 4, 2024
1 parent e48c975 commit d499901
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1 change: 1 addition & 0 deletions CHANGELOG.md
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Expand Up @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/).

## [Unreleased]

- Add `raw-access` options
- Move `Reg` in separate file
- Use `warning` class in docs
- Refactor `Accessor`
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12 changes: 10 additions & 2 deletions src/generate/device.rs
Original file line number Diff line number Diff line change
Expand Up @@ -63,8 +63,12 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result<Toke

out.extend(quote! {
use core::ops::Deref;
use core::marker::PhantomData;
});
if !config.raw_access {
out.extend(quote! {
use core::marker::PhantomData;
});
}

// Retaining the previous assumption
let mut fpu_present = true;
Expand Down Expand Up @@ -140,7 +144,11 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result<Toke
}

let generic_file = include_str!("generic.rs");
let generic_reg_file = include_str!("generic_reg_vcell.rs");
let generic_reg_file = if config.raw_access {
include_str!("generic_reg_raw.rs")
} else {
include_str!("generic_reg_vcell.rs")
};
let generic_atomic_file = include_str!("generic_atomic.rs");
if config.generic_mod {
let mut file = File::create(
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177 changes: 177 additions & 0 deletions src/generate/generic_reg_raw.rs
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@@ -0,0 +1,177 @@
/// This structure provides unsafe volatile access to registers.
pub struct Reg<REG: RegisterSpec> {
ptr: *mut u8,
_marker: marker::PhantomData<REG>,
}

unsafe impl<REG: RegisterSpec> Send for Reg<REG> where REG::Ux: Send {}

impl<REG: RegisterSpec> Reg<REG> {
#[inline(always)]
pub const fn new(ptr: *mut u8) -> Self {
Self {
ptr,
_marker: marker::PhantomData,
}
}
/// Returns the underlying memory address of register.
///
/// ```ignore
/// let reg_ptr = periph.reg.as_ptr();
/// ```
#[inline(always)]
pub const fn as_ptr(&self) -> *mut REG::Ux {
self.ptr.cast()
}
}

impl<REG: Readable> Reg<REG> {
/// Reads the contents of a `Readable` register.
///
/// You can read the raw contents of a register by using `bits`:
/// ```ignore
/// let bits = periph.reg.read().bits();
/// ```
/// or get the content of a particular field of a register:
/// ```ignore
/// let reader = periph.reg.read();
/// let bits = reader.field1().bits();
/// let flag = reader.field2().bit_is_set();
/// ```
#[inline(always)]
pub unsafe fn read(&self) -> R<REG> {
R {
bits: self.as_ptr().read_volatile(),
_reg: marker::PhantomData,
}
}
}

impl<REG: Resettable + Writable> Reg<REG> {
/// Writes the reset value to `Writable` register.
///
/// Resets the register to its initial state.
#[inline(always)]
pub unsafe fn reset(&self) {
self.as_ptr().write_volatile(REG::RESET_VALUE)
}

/// Writes bits to a `Writable` register.
///
/// You can write raw bits into a register:
/// ```ignore
/// periph.reg.write(|w| unsafe { w.bits(rawbits) });
/// ```
/// or write only the fields you need:
/// ```ignore
/// periph.reg.write(|w| w
/// .field1().bits(newfield1bits)
/// .field2().set_bit()
/// .field3().variant(VARIANT)
/// );
/// ```
/// or an alternative way of saying the same:
/// ```ignore
/// periph.reg.write(|w| {
/// w.field1().bits(newfield1bits);
/// w.field2().set_bit();
/// w.field3().variant(VARIANT)
/// });
/// ```
/// In the latter case, other fields will be set to their reset value.
#[inline(always)]
pub unsafe fn write<F>(&self, f: F)
where
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
{
self.as_ptr().write_volatile(
f(&mut W {
bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
| REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
_reg: marker::PhantomData,
})
.bits,
);
}
}

impl<REG: Writable> Reg<REG> {
/// Writes 0 to a `Writable` register.
///
/// Similar to `write`, but unused bits will contain 0.
///
/// # Safety
///
/// Unsafe to use with registers which don't allow to write 0.
#[inline(always)]
pub unsafe fn write_with_zero<F>(&self, f: F)
where
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
{
self.as_ptr().write_volatile(
f(&mut W {
bits: REG::Ux::default(),
_reg: marker::PhantomData,
})
.bits,
);
}
}

impl<REG: Readable + Writable> Reg<REG> {
/// Modifies the contents of the register by reading and then writing it.
///
/// E.g. to do a read-modify-write sequence to change parts of a register:
/// ```ignore
/// periph.reg.modify(|r, w| unsafe { w.bits(
/// r.bits() | 3
/// ) });
/// ```
/// or
/// ```ignore
/// periph.reg.modify(|_, w| w
/// .field1().bits(newfield1bits)
/// .field2().set_bit()
/// .field3().variant(VARIANT)
/// );
/// ```
/// or an alternative way of saying the same:
/// ```ignore
/// periph.reg.modify(|_, w| {
/// w.field1().bits(newfield1bits);
/// w.field2().set_bit();
/// w.field3().variant(VARIANT)
/// });
/// ```
/// Other fields will have the value they had before the call to `modify`.
#[inline(always)]
pub unsafe fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> &'w mut W<REG>,
{
let bits = self.as_ptr().read_volatile();
self.as_ptr().write_volatile(
f(
&R {
bits,
_reg: marker::PhantomData,
},
&mut W {
bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
| REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
_reg: marker::PhantomData,
},
)
.bits,
);
}
}

impl<REG: Readable> core::fmt::Debug for crate::generic::Reg<REG>
where
R<REG>: core::fmt::Debug,
{
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
unsafe { core::fmt::Debug::fmt(&self.read(), f) }
}
}
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