broken mir after removal of storage markers

[matthiaskrgr]

Repo files are of version d2731d8

~/.rustup/toolchains/d2731d8e9338d8fe844e19d3fbb39617753e65f4/bin/rustc  ./library/stdarch/crates/core_arch/src/lib.rs  --crate-type lib -Zmir-opt-level=3 --emit mir -Zvalidate-mir

no ICE

~/.rustup/toolchains/09db05762b283bed62d4f92729cfee4646519833/bin/rustc ./library/stdarch/crates/core_arch/src/lib.rs  --crate-type lib -Zmir-opt-level=3 --emit mir -Zvalidate-mir

error: internal compiler error: broken MIR in Item(WithOptConstParam { did: DefId(0:1351 ~ lib[8787]::core_arch::x86::avx::_mm256_loadu2_m128d), const_param_did: None }) (after DestinationPropagation in phase Optimization) at bb7[3]:
encountered overlapping memory in `Call` terminator: _33 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _38, move _38, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb10
    --> ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5
     |
2909 |     simd_shuffle4(a, a, [0, 1, 0, 0])
     |     --------------------------------- in the inlined copy of this code
...
3104 |     _mm256_insertf128_pd(a, _mm_loadu_pd(hiaddr), 1)
     |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
     |
     = note: delayed at compiler/rustc_mir/src/transform/validate.rs:120:36

error: internal compiler error: broken MIR in Item(WithOptConstParam { did: DefId(0:1351 ~ lib[8787]::core_arch::x86::avx::_mm256_loadu2_m128d), const_param_did: None }) (after SimplifyBranches-final in phase Optimization) at bb7[3]:
encountered overlapping memory in `Call` terminator: _33 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _38, move _38, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb10
    --> ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5
     |
2909 |     simd_shuffle4(a, a, [0, 1, 0, 0])
     |     --------------------------------- in the inlined copy of this code
...
3104 |     _mm256_insertf128_pd(a, _mm_loadu_pd(hiaddr), 1)
     |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
     |
     = note: delayed at compiler/rustc_mir/src/transform/validate.rs:120:36

error: internal compiler error: broken MIR in Item(WithOptConstParam { did: DefId(0:1351 ~ lib[8787]::core_arch::x86::avx::_mm256_loadu2_m128d), const_param_did: None }) (after RemoveNoopLandingPads in phase Optimization) at bb7[3]:
encountered overlapping memory in `Call` terminator: _33 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _38, move _38, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb10
    --> ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5
     |
2909 |     simd_shuffle4(a, a, [0, 1, 0, 0])
     |     --------------------------------- in the inlined copy of this code
...
3104 |     _mm256_insertf128_pd(a, _mm_loadu_pd(hiaddr), 1)
     |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
     |
     = note: delayed at compiler/rustc_mir/src/transform/validate.rs:120:36

thread 'rustc' panicked at 'no errors encountered even though `delay_span_bug` issued', compiler/rustc_errors/src/lib.rs:1012:13
note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace

error: internal compiler error: unexpected panic

note: the compiler unexpectedly panicked. this is a bug.

note: we would appreciate a bug report: https://github.com/rust-lang/rust/issues/new?labels=C-bug%2C+I-ICE%2C+T-compiler&template=ice.md

note: rustc 1.52.0-nightly (09db05762 2021-03-01) running on x86_64-unknown-linux-gnu

note: compiler flags: -Z mir-opt-level=3 -Z validate-mir --crate-type lib

query stack during panic:
end of query stack

So it's probably save to say that this is related to #78360 cc @tmiasko

Backtrace

error: internal compiler error: broken MIR in Item(WithOptConstParam { did: DefId(0:1351 ~ lib[8787]::core_arch::x86::avx::_mm256_loadu2_m128d), const_param_did: None }) (after DestinationPropagation in phase Optimization) at bb7[3]:
encountered overlapping memory in `Call` terminator: _33 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _38, move _38, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb10
    --> ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5
     |
2909 |     simd_shuffle4(a, a, [0, 1, 0, 0])
     |     --------------------------------- in the inlined copy of this code
...
3104 |     _mm256_insertf128_pd(a, _mm_loadu_pd(hiaddr), 1)
     |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
     |
     = note: delayed at compiler/rustc_mir/src/transform/validate.rs:120:36

error: internal compiler error: broken MIR in Item(WithOptConstParam { did: DefId(0:1351 ~ lib[8787]::core_arch::x86::avx::_mm256_loadu2_m128d), const_param_did: None }) (after SimplifyBranches-final in phase Optimization) at bb7[3]:
encountered overlapping memory in `Call` terminator: _33 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _38, move _38, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb10
    --> ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5
     |
2909 |     simd_shuffle4(a, a, [0, 1, 0, 0])
     |     --------------------------------- in the inlined copy of this code
...
3104 |     _mm256_insertf128_pd(a, _mm_loadu_pd(hiaddr), 1)
     |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
     |
     = note: delayed at compiler/rustc_mir/src/transform/validate.rs:120:36

error: internal compiler error: broken MIR in Item(WithOptConstParam { did: DefId(0:1351 ~ lib[8787]::core_arch::x86::avx::_mm256_loadu2_m128d), const_param_did: None }) (after RemoveNoopLandingPads in phase Optimization) at bb7[3]:
encountered overlapping memory in `Call` terminator: _33 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _38, move _38, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb10
    --> ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5
     |
2909 |     simd_shuffle4(a, a, [0, 1, 0, 0])
     |     --------------------------------- in the inlined copy of this code
...
3104 |     _mm256_insertf128_pd(a, _mm_loadu_pd(hiaddr), 1)
     |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
     |
     = note: delayed at compiler/rustc_mir/src/transform/validate.rs:120:36

thread 'rustc' panicked at 'no errors encountered even though `delay_span_bug` issued', compiler/rustc_errors/src/lib.rs:1012:13
stack backtrace:
   0:     0x7ffa04440eb0 - std::backtrace_rs::backtrace::libunwind::trace::h9d49145f95eb5894
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/../../backtrace/src/backtrace/libunwind.rs:90:5
   1:     0x7ffa04440eb0 - std::backtrace_rs::backtrace::trace_unsynchronized::hab1d020365bb6864
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/../../backtrace/src/backtrace/mod.rs:66:5
   2:     0x7ffa04440eb0 - std::sys_common::backtrace::_print_fmt::h7659588431e304bd
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/sys_common/backtrace.rs:67:5
   3:     0x7ffa04440eb0 - <std::sys_common::backtrace::_print::DisplayBacktrace as core::fmt::Display>::fmt::h09f4a9e3befae3c7
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/sys_common/backtrace.rs:46:22
   4:     0x7ffa044b15dc - core::fmt::write::hf3fdfde304b9a088
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/core/src/fmt/mod.rs:1092:17
   5:     0x7ffa044341f2 - std::io::Write::write_fmt::h1cb850689c7116f0
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/io/mod.rs:1568:15
   6:     0x7ffa04444d55 - std::sys_common::backtrace::_print::hdbccd5aa093ba544
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/sys_common/backtrace.rs:49:5
   7:     0x7ffa04444d55 - std::sys_common::backtrace::print::hc639c4f320222558
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/sys_common/backtrace.rs:36:9
   8:     0x7ffa04444d55 - std::panicking::default_hook::{{closure}}::hdb012dd7a485bb5d
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/panicking.rs:208:50
   9:     0x7ffa04444803 - std::panicking::default_hook::h75facbce77b6ba91
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/panicking.rs:225:9
  10:     0x7ffa04c37a9b - rustc_driver::report_ice::h01b4629c250edc77
  11:     0x7ffa04445656 - std::panicking::rust_panic_with_hook::hbcaa5de2cb5e22d5
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/panicking.rs:595:17
  12:     0x7ffa04445177 - std::panicking::begin_panic_handler::{{closure}}::h4ee6cde415c8f62d
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/panicking.rs:497:13
  13:     0x7ffa0444136c - std::sys_common::backtrace::__rust_end_short_backtrace::h895319f2d3f611c0
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/sys_common/backtrace.rs:141:18
  14:     0x7ffa044450d9 - rust_begin_unwind
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/panicking.rs:493:5
  15:     0x7ffa0444508b - std::panicking::begin_panic_fmt::h0262e6b4d4041adf
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/panicking.rs:435:5
  16:     0x7ffa07420c83 - rustc_errors::HandlerInner::flush_delayed::hc9538a5c5ab9aee8
  17:     0x7ffa0741f594 - <rustc_errors::HandlerInner as core::ops::drop::Drop>::drop::h3720416108e4f7ec
  18:     0x7ffa0693b83b - core::ptr::drop_in_place<rustc_session::parse::ParseSess>::h1894c421c112d069
  19:     0x7ffa0693ee30 - <alloc::rc::Rc<T> as core::ops::drop::Drop>::drop::hdf93495fe6008488
  20:     0x7ffa069724ed - core::ptr::drop_in_place<rustc_interface::interface::Compiler>::hc3bc67a063544d4a
  21:     0x7ffa06971b50 - rustc_span::with_source_map::h4a0dc647038ad76f
  22:     0x7ffa069419ea - rustc_interface::interface::create_compiler_and_run::h4b294c33113a1bc7
  23:     0x7ffa0693fb28 - scoped_tls::ScopedKey<T>::set::h3d50179f272e16d1
  24:     0x7ffa069401ec - std::sys_common::backtrace::__rust_begin_short_backtrace::h7cf87b5fc59a6baa
  25:     0x7ffa0695f43a - core::ops::function::FnOnce::call_once{{vtable.shim}}::h8b483ac32d974368
  26:     0x7ffa0445583a - <alloc::boxed::Box<F,A> as core::ops::function::FnOnce<Args>>::call_once::hdc51fe7e73bc86bf
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/alloc/src/boxed.rs:1546:9
  27:     0x7ffa0445583a - <alloc::boxed::Box<F,A> as core::ops::function::FnOnce<Args>>::call_once::he605738a76b56d9d
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/alloc/src/boxed.rs:1546:9
  28:     0x7ffa0445583a - std::sys::unix::thread::Thread::new::thread_start::he44b12fd83e74919
                               at /rustc/09db05762b283bed62d4f92729cfee4646519833/library/std/src/sys/unix/thread.rs:71:17
  29:     0x7ffa0435b299 - start_thread
  30:     0x7ffa04270053 - clone
  31:                0x0 - <unknown>

error: internal compiler error: unexpected panic

note: the compiler unexpectedly panicked. this is a bug.

note: we would appreciate a bug report: https://github.com/rust-lang/rust/issues/new?labels=C-bug%2C+I-ICE%2C+T-compiler&template=ice.md

note: rustc 1.52.0-nightly (09db05762 2021-03-01) running on x86_64-unknown-linux-gnu

note: compiler flags: -Z mir-opt-level=3 -Z validate-mir --crate-type lib

query stack during panic:
end of query stack

[tmiasko]

After -Zdump-mir=all with 28GB more MIR on hard drive. _38 is moved twice in a call terminator, after destination propagation, which is currently considered to be an erroneous by the validator (see also discussion in #68364, #71117).

--- lib.core_arch-x86-avx-_mm256_loadu2_m128d.005-012.DestinationPropagation.before.mir	2021-03-01 22:19:22.215157300 +0100
+++ lib.core_arch-x86-avx-_mm256_loadu2_m128d.005-012.DestinationPropagation.after.mir	2021-03-01 22:19:22.215157300 +0100
@@ -179,10 +179,10 @@
     }
 
     bb7: {
-        _32 = _6;                        // scope 19 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5: 3104:53
-        _39 = _7;                        // scope 19 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5: 3104:53
-        _38 = _39;                       // scope 21 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5: 3104:53
-        _33 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _38, move _39, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb10; // scope 21 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5: 3104:53
+        _32 = _34;                       // scope 19 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5: 3104:53
+        _38 = _7;                        // scope 19 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5: 3104:53
+        nop;                             // scope 21 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5: 3104:53
+        _33 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _38, move _38, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb10; // scope 21 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5: 3104:53
                                          // mir::Constant
                                          // + span: ./library/stdarch/crates/core_arch/src/x86/avx.rs:3104:5: 3104:53
                                          // + literal: Const { ty: unsafe extern "platform-intrinsic" fn(core_arch::x86::__m128d, core_arch::x86::__m128d, [u32; 4]) -> core_arch::x86::__m256d {core_arch::simd_llvm::simd_shuffle4::<core_arch::x86::__m128d, core_arch::x86::__m256d>}, val: Value(Scalar(<ZST>)) }

Most likely destination propagation should record pairwise conflicts between each local that is moved in the terminator.

Thanks for report!

[jonas-schievink]

Most likely destination propagation should record pairwise conflicts between each local that is moved in the terminator.

Yeah, it should. But I thought I implemented that already.

[tmiasko]

I opened #82684 to disable destination propagation for now.

The removal of storage markers is significant because it enables extra CFG simplification and one of callees is now within inlining threshold.

Diff

--- before/lib.core_arch-x86-avx-_mm256_insertf128_pd.005-022.PreCodegen.before.mir	2021-03-02 00:03:20.903932968 +0100
+++ after/lib.core_arch-x86-avx-_mm256_insertf128_pd.005-022.PreCodegen.before.mir	2021-03-01 22:19:20.951121662 +0100
@@ -21,80 +21,56 @@
         let mut _12: core_arch::x86::__m128d; // in scope 2 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:31: 1550:56
         let mut _13: core_arch::x86::__m128d; // in scope 2 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:31: 1550:56
     }
 
     bb0: {
-        StorageLive(_4);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1549:11: 1549:19
-        StorageLive(_5);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1549:11: 1549:15
         _5 = _3;                         // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1549:11: 1549:15
         _4 = BitAnd(move _5, const 1_i32); // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1549:11: 1549:19
-        StorageDead(_5);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1549:18: 1549:19
         switchInt(_4) -> [0_i32: bb2, otherwise: bb1]; // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:9: 1550:10
     }
 
     bb1: {
-        StorageLive(_8);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:28: 1551:29
         _8 = _1;                         // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:28: 1551:29
-        StorageLive(_9);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:31: 1551:56
         _11 = _2;                        // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:54: 1551:55
-        StorageLive(_10);                // scope 1 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:31: 1551:56
         _10 = _11;                       // scope 1 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:31: 1551:56
-        _9 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _10, move _11, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb6; // scope 1 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:31: 1551:56
+        _9 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _10, move _11, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb4; // scope 1 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:31: 1551:56
                                          // mir::Constant
                                          // + span: ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:31: 1551:56
                                          // + literal: Const { ty: unsafe extern "platform-intrinsic" fn(core_arch::x86::__m128d, core_arch::x86::__m128d, [u32; 4]) -> core_arch::x86::__m256d {core_arch::simd_llvm::simd_shuffle4::<core_arch::x86::__m128d, core_arch::x86::__m256d>}, val: Value(Scalar(<ZST>)) }
                                          // mir::Constant
                                          // + span: ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:31: 1551:56
                                          // + literal: Const { ty: [u32; 4], val: Value(ByRef { alloc: Allocation { bytes: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], relocations: Relocations(SortedMap { data: [] }), init_mask: InitMask { blocks: [65535], len: Size { raw: 16 } }, size: Size { raw: 16 }, align: Align { pow2: 2 }, mutability: Not, extra: () }, offset: Size { raw: 0 } }) }
     }
 
     bb2: {
-        StorageLive(_6);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:28: 1550:29
         _6 = _1;                         // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:28: 1550:29
-        StorageLive(_7);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:31: 1550:56
         _13 = _2;                        // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:54: 1550:55
-        StorageLive(_12);                // scope 2 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:31: 1550:56
         _12 = _13;                       // scope 2 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:31: 1550:56
-        _7 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _12, move _13, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb7; // scope 2 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:31: 1550:56
+        _7 = simd_llvm::simd_shuffle4::<x86::__m128d, x86::__m256d>(move _12, move _13, const [0_u32, 1_u32, 0_u32, 0_u32]) -> bb5; // scope 2 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:31: 1550:56
                                          // mir::Constant
                                          // + span: ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:31: 1550:56
                                          // + literal: Const { ty: unsafe extern "platform-intrinsic" fn(core_arch::x86::__m128d, core_arch::x86::__m128d, [u32; 4]) -> core_arch::x86::__m256d {core_arch::simd_llvm::simd_shuffle4::<core_arch::x86::__m128d, core_arch::x86::__m256d>}, val: Value(Scalar(<ZST>)) }
                                          // mir::Constant
                                          // + span: ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:31: 1550:56
                                          // + literal: Const { ty: [u32; 4], val: Value(ByRef { alloc: Allocation { bytes: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], relocations: Relocations(SortedMap { data: [] }), init_mask: InitMask { blocks: [65535], len: Size { raw: 16 } }, size: Size { raw: 16 }, align: Align { pow2: 2 }, mutability: Not, extra: () }, offset: Size { raw: 0 } }) }
     }
 
     bb3: {
-        StorageDead(_7);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:70: 1550:71
-        StorageDead(_6);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:70: 1550:71
-        goto -> bb5;                     // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1549:5: 1552:6
+        return;                          // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1549:5: 1552:6
     }
 
     bb4: {
-        StorageDead(_9);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:70: 1551:71
-        StorageDead(_8);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:70: 1551:71
-        goto -> bb5;                     // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1549:5: 1552:6
-    }
-
-    bb5: {
-        StorageDead(_4);                 // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1553:1: 1553:2
-        return;                          // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1553:2: 1553:2
-    }
-
-    bb6: {
-        StorageDead(_10);                // scope 1 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:31: 1551:56
-        _0 = simd_llvm::simd_shuffle4::<x86::__m256d, x86::__m256d>(move _8, move _9, const x86::avx::_mm256_insertf128_pd::promoted[1]) -> bb4; // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:14: 1551:71
+        _0 = simd_llvm::simd_shuffle4::<x86::__m256d, x86::__m256d>(move _8, move _9, const x86::avx::_mm256_insertf128_pd::promoted[1]) -> bb3; // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:14: 1551:71
                                          // mir::Constant
                                          // + span: ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:14: 1551:27
                                          // + literal: Const { ty: unsafe extern "platform-intrinsic" fn(core_arch::x86::__m256d, core_arch::x86::__m256d, [u32; 4]) -> core_arch::x86::__m256d {core_arch::simd_llvm::simd_shuffle4::<core_arch::x86::__m256d, core_arch::x86::__m256d>}, val: Value(Scalar(<ZST>)) }
                                          // mir::Constant
                                          // + span: ./library/stdarch/crates/core_arch/src/x86/avx.rs:1551:14: 1551:71
                                          // + literal: Const { ty: [u32; 4], val: Unevaluated(WithOptConstParam { did: DefId(0:1247 ~ lib[8787]::core_arch::x86::avx::_mm256_insertf128_pd), const_param_did: None }, [], Some(promoted[1])) }
     }
 
-    bb7: {
-        StorageDead(_12);                // scope 2 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:31: 1550:56
+    bb5: {
         _0 = simd_llvm::simd_shuffle4::<x86::__m256d, x86::__m256d>(move _6, move _7, const x86::avx::_mm256_insertf128_pd::promoted[0]) -> bb3; // scope 0 at ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:14: 1550:71
                                          // mir::Constant
                                          // + span: ./library/stdarch/crates/core_arch/src/x86/avx.rs:1550:14: 1550:27
                                          // + literal: Const { ty: unsafe extern "platform-intrinsic" fn(core_arch::x86::__m256d, core_arch::x86::__m256d, [u32; 4]) -> core_arch::x86::__m256d {core_arch::simd_llvm::simd_shuffle4::<core_arch::x86::__m256d, core_arch::x86::__m256d>}, val: Value(Scalar(<ZST>)) }
                                          // mir::Constant