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Add User Mode registers #119

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merged 3 commits into from Feb 10, 2020
Merged

Add User Mode registers #119

merged 3 commits into from Feb 10, 2020

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@vinaychandra
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vinaychandra commented Jan 24, 2020

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phil-opp left a comment

Thanks a lot for the pull request! I left a few comments, but otherwise this looks good to me. Thanks especially for adding extensive documentation for everything!

SegmentSelector((raw.0 + 16 - 3).try_into().unwrap()),
SegmentSelector((raw.0 + 8 - 3).try_into().unwrap()),
Comment on lines 240 to 241

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phil-opp Jan 24, 2020

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Could you clarify why you're doing - 3 here?

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vinaychandra Jan 24, 2020

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The values in the registers are or'ed with 0b11 for sysret registers regardless of what the user specified. We are subtracting that back so that the user can directly match with their gdt's user mode entry rather

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The problem I see is that the user might also pass a segment selector with the requested privilege bits already set to 0b11. In this case, it would be very strange to get a selector with requested privilege level 0 back, i.e. not the same that was written.

src/registers/model_specific.rs Outdated Show resolved Hide resolved
src/registers/model_specific.rs Outdated Show resolved Hide resolved
src/registers/model_specific.rs Outdated Show resolved Hide resolved
src/registers/model_specific.rs Outdated Show resolved Hide resolved
return Err("Syscall CS and SS is not offset by 8.");
}

Self::write_raw(((ss_sysret.0 - 8) | 0b11).into(), cs_syscall.0.into());

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I'm not sure if automatically setting the RPL to 0b11 is the right solution. The alternative would be to require the caller to properly set these bits. What do you think is the better solution?

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vinaychandra Jan 24, 2020

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The amd64 documentation says it is required but will not be tested. That is why i implicitly left it like this. This also provides direct one to one mapping to the user segment functions from gdt. Also the user can use write_raw to test it otherwise.

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This also provides direct one to one mapping to the user segment functions from gdt.

The user segment functions only return a GDT descriptor, not a segment selector. You mean the add_entry function? If yes, there is currently an open issue about whether we should hardcode the requested privilege level in that function: #120

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vinaychandra commented Jan 26, 2020

@phil-opp, updated as per comments

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phil-opp commented Jan 27, 2020

Thanks for the updates! I'm still not sure whether automatically adjusting the requested privilege level is a good idea (see the inline comments). Maybe @haraldh, who opened the related #120, has an opinion on this matter?

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haraldh commented Jan 27, 2020

Yeah, I think we should fix #120 and then assert for the bits, if set/not set at the corresponding places. Or maybe even better and idiomatic, have different SegmentSelector types according to the privilege bits

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vinaychandra commented Feb 1, 2020

Another option is to remove the read altogether and just go with read raw for now. What do you think @phil-opp?

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phil-opp commented Feb 4, 2020

While we could merge this with only read_raw/write_raw (i.e. without read/write), I think a better solution would be the following:

  • Add a simple set_rpl(&mut self, rpl: PrivilegeLevel) method to the SegmentSelector type
  • Remove the - 3 operation from read.
  • Remove the | 0b11 operation from write. Instead, add an assert_eq!(ss_sysret.rpl(), PrivilegeLevel::Ring3) and mention this requirement in the function documentation.

What do you think about this, @vinaychandra?

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vinaychandra commented Feb 8, 2020

Makes sense, I updated the PR accordingly

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phil-opp commented Feb 10, 2020

Thanks a lot!

@phil-opp phil-opp merged commit 4ebcf1e into rust-osdev:master Feb 10, 2020
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phil-opp added a commit that referenced this pull request Feb 10, 2020
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phil-opp commented Feb 10, 2020

Published together with #118 as version 0.9.0.

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