Build breaks on armv7, i386

[yurivict]

On armv7:

<inline asm>:21:26: note: instantiated into assembly here
        vext.32     q4, q4, q4, $2
                                ^
In file included from main/arm/neon-d32.cpp:51:
/wrkdirs/usr/ports/audio/lsp-plugins-lv2/work/lsp-plugins/modules/lsp-dsp-lib/include/private/dsp/arch/arm/neon-d32/copy.h:371:17: error: operand must be an immediate in the range [0,15]
                __ASM_EMIT("vext.32     q4, q4, q4, $2")
                ^

It also breaks on i386 with the error: inline assembly requires more registers than available.

Version: 1.2.1
clang-13
FreeBSD 13.1

[sadko4u]

For me it's not possible to perform build for ARM at this moment. Any ways to reproduce?

[yurivict]

Unfortunately I don't have access to such systems.
The error occurred on central build FreeBSD server.

[sadko4u]

For ARM that seems that inline assembly doesn't like the numbers like $2 and strictly requires #2 instead.
I think this is simple to fix.

[sadko4u]

For building on i386: reproduced the case.
It seems that clang is behaving a bit different when allocating registers.
Consider the following example:

        void lr_to_ms(float *m, float *s, const float *l, const float *r, size_t count)
        {
            size_t off;

            __asm__ __volatile__
            (
                : [off] "=&r" (off),
                  [count] "+g" (count)
                : [left] "r"(l), [right] "r" (r),
                  [mid] "r" (m), [side] "r" (s)
                : "cc", "memory"
            );
        }

Here we see that there are five parameters that strictly require registers by using the r constraint and one general parameter defined by g constraint.
GCC parameter allocation works in such manner: it allocates 5 general-purpose registers for [off], [left], [right], [mid] and [side] parameters and, after that, tries to allocate additional register for [count]. If there is no available register, then GCC decides to use memory instead.
According to CLANG's algorithm, it seems that g is allocated as a register without looking the count of r constraints. And that's why CLANG considers 6 registers being allocated (from total 8 available where ESP and EBP are busy for stack pointers) which is considered to be error at least because EBX is also busy for position-independent code purpose.
Changing constraints to this:

        void lr_to_ms(float *m, float *s, const float *l, const float *r, size_t count)
        {
            size_t off;

            __asm__ __volatile__
            (
                : [off] "=&r" (off),
                  [count] "+m" (count)
                : [left] "r"(l), [right] "r" (r),
                  [mid] "r" (m), [side] "r" (s)
                : "cc", "memory"
            );
        }

Fixes problem.

I think, it is a good reason to report a but to clang's upstream. I'll try to provide the workaround.

[sadko4u]

Updated code to make it properly compile for i386 using CLANG compiler:
lsp-plugins/lsp-dsp-lib@8ad15a8

[sadko4u]

Updated the code. Verified build on 32-bit ARM:
lsp-plugins/lsp-dsp-lib@72bb618

[sadko4u]

Additionally, made possible build for AArch64.

[yurivict]

I'll try it when these changes get into release.

[sadko4u]

Available in 1.2.3 release!