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@greeka
greeka committed May 18, 2016
1 parent 0b15f11 commit 4dcaf40
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Showing 35 changed files with 3,711 additions and 82 deletions.
21 changes: 18 additions & 3 deletions DeviceLib/Src/nRF24L01P.c
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Expand Up @@ -45,15 +45,23 @@ void nRF24_RXMode() {
// printf("* RXMode\n");
HAL_SPI_FlushRxFifo(hspiTxRx);
CE_LOW();
uint8_t reg, i = 0x00;
do {
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_CONFIG, 0x0D); // Config: Power Off
reg = nRF24_ReadReg( nRF24_REG_CONFIG );
i++;
} while (reg != 0x0D && i < 0xFF);

nRF24_WriteBuf(nRF24_CMD_WREG | nRF24_REG_RX_ADDR_P0,nRF24_Rx_addr,nRF24_RX_ADDR_WIDTH); // Set static RX address
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_FEATURE, 0x04); //Allow dynamic payload length
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_DYNPD, 0x1F); //Enable dynamic payload length for 0-5 channels
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_EN_AA,0x1F); // Enable autoack for data pipe 1
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_EN_RXADDR,0x1F); // Enable data pipe 0-1
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_RF_CH,0x7C); // Set frequency channel 124 (2.524MHz)
// nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_RX_PW_P0,RX_PAYLOAD); // Set RX payload length (10 bytes)
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_RF_SETUP,0x26); // Setup: 1Mbps, 0dBm, LNA off
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_RF_SETUP,0x27); // Setup: 250Kbps, 0dBm, LNA off
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_CONFIG,0x0F); // Config: CRC on (2 bytes), Power UP, RX/TX ctl = PRX
HAL_Delay(5);
CE_HIGH();
}

Expand All @@ -62,13 +70,20 @@ void nRF24_TXMode() {
// printf("* TXMode\n");
HAL_SPI_FlushRxFifo(hspiTxRx);
CE_LOW();
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_CONFIG,0x02); // Config: Power UP
uint8_t reg, i = 0x00;
do {
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_CONFIG, 0x0C); // Config: Power Off
reg = nRF24_ReadReg( nRF24_REG_CONFIG );
i++;
} while (reg != 0x0C && i < 0xFF);

// nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_CONFIG,0x02); // Config: Power UP
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_FEATURE, 0x04); //Allow dynamic payload length
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_DYNPD, 0x1F); //Enable dynamic payload length for 0-5 channels
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_EN_AA,0x1F); // Enable auto acknowledgement for data pipe 1
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_SETUP_RETR,0x1A); // Auto retransmit: wait 500us, 10 retries
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_RF_CH,0x7C); // Set frequency channel 124 (2.524MHz)
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_RF_SETUP,0x23); // Setup: 1Mbps, 0dBm, LNA off
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_RF_SETUP,0x27); // Setup: 250Kbps, +7dBm(SI24R1)
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_CONFIG,0x0E); // Config: CRC on (2 bytes), Power UP, RX/TX ctl = PTX
CE_HIGH();
}
Expand Down
40 changes: 40 additions & 0 deletions Lib/Inc/F030f4_Peripheral.h
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@@ -0,0 +1,40 @@
#include "stm32f0xx.h"
#include "stdint.h"
#include "xdebug.h"

/** @addtogroup Exported_macros
* @{
*/
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
#define READ_BIT(REG, BIT) ((REG) & (BIT))
#define CLEAR_REG(REG) ((REG) = (0x0))
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
#define READ_REG(REG) ((REG))
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
#define UNUSED(x) ((void)(x))

#define F030f4_CSN_LOW() GPIOA->BSRR = GPIO_BSRR_BR_1
#define F030f4_CSN_HIGH() GPIOA->BSRR = GPIO_BSRR_BS_1

#define F030f4_CE_LOW() GPIOA->BSRR = GPIO_BSRR_BR_4
#define F030f4_CE_HIGH() GPIOA->BSRR = GPIO_BSRR_BS_4

#define DWT_CYCCNT *(volatile uint32_t *)0xE0001004
#define DWT_CONTROL *(volatile uint32_t *)0xE0001000
#define SCB_DEMCR *(volatile uint32_t *)0xE000EDFC

void F030f4_System_Configure (void);
void F030f4_RTC_Configure (void);
void F030f4_USART_Configure(void);
void F030f4_SPI_Configure (void);
void F030f4_GPIO_Configure (void);
void F030f4_TIM_Configure (void);

void SPI_SendData(uint8_t *Data, uint16_t Length);
void SPI_ReadRxFifoData(uint8_t *Data, uint16_t Length);
void SPI_ReadData(uint8_t *Data, uint16_t Length, uint8_t Dummy);
void SPI_FlushRxFifo(void);

void USART_SendChar( unsigned char ch);
void USART_SendData(uint8_t *Data, uint16_t Length);
110 changes: 110 additions & 0 deletions Lib/Inc/nRF24L01P.h
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@@ -0,0 +1,110 @@
#include "stm32f0xx.h"
#include "F030f4_Peripheral.h"

#ifndef __nRF24L01_H
#define __nRF24L01_H

// nRF24L01 CE (Transmit) pin
#define nRF24_CE_PORT CE_GPIO_Port
#define nRF24_CE_PIN CE_Pin

#define CE_LOW() F030f4_CE_LOW()
#define CE_HIGH() F030f4_CE_HIGH()

// nRF24L01 CSN (Chip Enable) pin
#define nRF24_CSN_PORT CSN_GPIO_Port
#define nRF24_CSN_PIN CSN_Pin

#define CSN_LOW() F030f4_CSN_LOW()
#define CSN_HIGH() F030f4_CSN_HIGH()

/* nRF24L0 commands */
#define nRF24_CMD_RREG 0x00 // R_REGISTER -> Read command and status registers
#define nRF24_CMD_WREG 0x20 // W_REGISTER -> Write command and status registers
#define nRF24_CMD_R_RX_PAYLOAD 0x61 // R_RX_PAYLOAD -> Read RX payload
#define nRF24_CMD_W_TX_PAYLOAD 0xA0 // W_TX_PAYLOAD -> Write TX payload
#define nRF24_CMD_FLUSH_TX 0xE1 // FLUSH_TX -> Flush TX FIFO
#define nRF24_CMD_FLUSH_RX 0xE2 // FLUSH_RX -> Flush RX FIFO
#define nRF24_CMD_REUSE_TX_PL 0xE3 // REUSE_TX_PL -> Reuse last transmitted payload
#define nRF24_CMD_R_RX_PL_WID 0x60 // Read RX payload width for the top R_RX_PAYLOAD in the RX FIFO.
#define nRF24_CMD_NOP 0xFF // No operation (to read status register)

/* nRF24L0 registers */
#define nRF24_REG_CONFIG 0x00 // Configuration register
#define nRF24_REG_EN_AA 0x01 // Enable "Auto acknowledgment"
#define nRF24_REG_EN_RXADDR 0x02 // Enable RX addresses
#define nRF24_REG_SETUP_AW 0x03 // Setup of address widths
#define nRF24_REG_SETUP_RETR 0x04 // Setup of automatic retranslation
#define nRF24_REG_RF_CH 0x05 // RF channel
#define nRF24_REG_RF_SETUP 0x06 // RF setup register
#define nRF24_REG_STATUS 0x07 // Status register
#define nRF24_REG_OBSERVE_TX 0x08 // Transmit observe register
#define nRF24_REG_CD 0x09 // Carrier detect
#define nRF24_REG_RX_ADDR_P0 0x0A // Receive address data pipe 0
#define nRF24_REG_RX_ADDR_P1 0x0B // Receive address data pipe 1
#define nRF24_REG_RX_ADDR_P2 0x0C // Receive address data pipe 2
#define nRF24_REG_RX_ADDR_P3 0x0D // Receive address data pipe 3
#define nRF24_REG_RX_ADDR_P4 0x0E // Receive address data pipe 4
#define nRF24_REG_RX_ADDR_P5 0x0F // Receive address data pipe 5
#define nRF24_REG_TX_ADDR 0x10 // Transmit address
#define nRF24_REG_RX_PW_P0 0x11 // Number of bytes in RX payload id data pipe 0
#define nRF24_REG_RX_PW_P1 0x12 // Number of bytes in RX payload id data pipe 1
#define nRF24_REG_RX_PW_P2 0x13 // Number of bytes in RX payload id data pipe 2
#define nRF24_REG_RX_PW_P3 0x14 // Number of bytes in RX payload id data pipe 3
#define nRF24_REG_RX_PW_P4 0x15 // Number of bytes in RX payload id data pipe 4
#define nRF24_REG_RX_PW_P5 0x16 // Number of bytes in RX payload id data pipe 5
#define nRF24_REG_FIFO_STATUS 0x17 // FIFO status register
#define nRF24_REG_DYNPD 0x1C // Enable dynamic payload length
#define nRF24_REG_FEATURE 0x1D // Feature register

/* nRF24L0 bits */
#define nRF24_MASK_RX_DR 0x40 // Mask interrupt caused by RX_DR
#define nRF24_MASK_TX_DS 0x20 // Mask interrupt caused by TX_DS
#define nRF24_MASK_MAX_RT 0x10 // Mask interrupt caused by MAX_RT
#define nRF24_FIFO_RX_EMPTY 0x01 // RX FIFO empty flag
#define nRF24_FIFO_RX_FULL 0x02 // RX FIFO full flag

/* Some constants */
#define nRF24_RX_ADDR_WIDTH 5 // nRF24 RX address width
#define nRF24_TX_ADDR_WIDTH 5 // nRF24 TX address width
#define SPI_TIMEOUT 1000

#define nRF24_SWITCH_TO_NONE 0x00
#define nRF24_SWITCH_TO_TX 0x01
#define nRF24_SWITCH_TO_RX 0x02

/* Variables */
/*uint8_t nRF24_RX_addr[nRF24_RX_ADDR_WIDTH];
uint8_t nRF24_TX_addr[nRF24_TX_ADDR_WIDTH];*/
//uint8_t nRF24_SwitchTo;

/* Function prototypes */
//void nRF24_init();

void nRF24_SetDeviceAddress(uint8_t *Address, uint8_t Override);
void nRF24_SetDefaultDeviceAddress(void);
uint8_t* nRF24_GetDeviceAddress(void);
void nRF24_SetHUBAddress(uint8_t *Address);
uint8_t* nRF24_GetHUBAddress(void);
void nRF24_SetSwitchTo(uint8_t SwitchTo);
//void nRF24_SetSPIHandler(SPI_HandleTypeDef* hspi);
void nRF24_RXMode(void);
void nRF24_TXMode(void);
uint8_t nRF24_TXPacket(uint8_t *nRF24_Tx_addr, uint8_t *pBuf, uint8_t Length);
void nRF24_RXPacket(uint8_t *pBuf, uint8_t* Length);
void nRF24_RWReg(uint8_t Reg, uint8_t Data);
uint8_t nRF24_ReadReg(uint8_t Reg);
void nRF24_WriteBuf(uint8_t Reg, uint8_t *Data, uint8_t size);
void nRF24_ReadBuf(uint8_t Reg, uint8_t *Data, uint8_t count);
uint8_t nRF24_DataReady(void);
void nRF24_DumpRegisters(void);
uint8_t nRF24_SendCmd(uint8_t Cmd);
uint8_t nRF24_GetStatus(void);
uint8_t nRF24_HandleStatus(void);

static void SPIx_Error (void);

static void SPIx_Write(uint8_t Value);
static uint32_t SPIx_Read(void);

#endif /* __nRF24L01_H */
25 changes: 25 additions & 0 deletions Lib/Inc/rf_cmd.h
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@@ -0,0 +1,25 @@
#include "stm32f0xx.h"
#include <stdint.h>

#ifndef __rf_CMD_H
#define __rf_CMD_H

#define PD_H_MASK_RESPONSE 0x10 // Request/response bit
#define PD_H_MASK_CONFIRMATION 0x08 // Needs confirmation 0 - no confirmation, 1 - confirmation needed
#define PD_H_MASK_N_PACKAGE 0x04 // Number of package 0 - first, 1 second
#define PD_H_MASK_HUB_ID_LEN 0x02 // hubID length 0 - 5 Bytes, 1 - 8 Bytes
#define PD_H_MASK_COMMAND_LEN 0x01 // command length 0 - 1 Byte, 1 - more than 1 Byte

#define rfCMD_PING 0x00
#define rfCMD_DISCOVER 0x01
#define rfCMD_W_DATA 0x02
#define rfCMD_R_DATA 0x03
#define rfCMD_W_CONFIG 0x04
#define rfCMD_R_CONFIG 0x05


void ProcessData(uint8_t *Data, uint8_t Length);
void SaveAddress(uint8_t *Address, uint8_t *HubAddress);
void SendCommandToHub(uint8_t Command, uint8_t *Data, uint8_t Size);

#endif /* __rf_CMD_H */
Empty file added Lib/Inc/timestamp.h
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Empty file.
16 changes: 16 additions & 0 deletions Lib/Inc/xdebug.h
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@@ -0,0 +1,16 @@

#define _DEBUG

#ifdef _DEBUG

#include "xprintf.h"

#define dxdev_out xdev_out
#define dxputs xputs
#define dxprintf xprintf

#else
#define dxdev_out(...)
#define dxputs(...)
#define dxprintf(...)
#endif
39 changes: 39 additions & 0 deletions Lib/Inc/xprintf.h
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@@ -0,0 +1,39 @@
/*------------------------------------------------------------------------*/
/* Universal string handler for user console interface (C)ChaN, 2011 */
/*------------------------------------------------------------------------*/

#ifndef _STRFUNC
#define _STRFUNC

#define _USE_XFUNC_OUT 1 /* 1: Use output functions */
#define _CR_CRLF 1 /* 1: Convert \n ==> \r\n in the output char */

#define _USE_XFUNC_IN 0 /* 1: Use input function */
#define _LINE_ECHO 0 /* 1: Echo back input chars in xgets function */


#if _USE_XFUNC_OUT
#define xdev_out(func) xfunc_out = (void(*)(unsigned char))(func)
extern void (*xfunc_out)(unsigned char);
void xputc (char c);
void xputs (const char* str);
void xfputs (void (*func)(unsigned char), const char* str);
void xprintf (const char* fmt, ...);
void xuprintf (const char* fmt, ...);
void xsprintf (char* buff, const char* fmt, ...);
void xfprintf (void (*func)(unsigned char), const char* fmt, ...);
void put_dump (const void* buff, unsigned long addr, int len, int width);
#define DW_CHAR sizeof(char)
#define DW_SHORT sizeof(short)
#define DW_LONG sizeof(long)
#endif

#if _USE_XFUNC_IN
#define xdev_in(func) xfunc_in = (unsigned char(*)(void))(func)
extern unsigned char (*xfunc_in)(void);
int xgets (char* buff, int len);
int xfgets (unsigned char (*func)(void), char* buff, int len);
int xatoi (char** str, long* res);
#endif

#endif

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