VHDL code written by Samantha Pfeiffer and Samuel Donovan for their Digital Systems (CENG 342) class at SDMines. None of it is copyrighted and anyone is free to take any code and do anything with it.
Each Lab folder contains a report pdf that outlines in detail the lab.
All designs were tested and made for a Nexys A7-100T (xc7a100tcsg324-1) FPGA board in VHDL using Vivado 2020.2.
Comparators & 2x4 Decoder
Multiplexors
Generic Multiplexors
Adder/Subtractor and Barrel Shifter
ALU (Arithmatic Logic Unit)
BTU (Branch Test Unit)
Register File