Update bootloader; Refactor & cleanup

- Bootloader:
    - rename: flashboot -> bootloader
    - add bootmode functionality

- rtl/tb testbench:
    - update testbench
    - add makefile
- minor refactoring & cleanup

rtl/soc/hydrogensoc/HydrogenSoC.v

@@ -9,14 +9,14 @@
 
 `ifdef verilator
     // Macros for Verilator
-`else
+`endif
 `ifdef SYNTHESIS_YOSYS
     // Macros for Yosys
-`else // `SYNTHESIS             (macro for ISE synthesis)
+`endif
+`ifdef SYNTHESIS
     // Macros for Xilinx ISE
     `define __ROM_INIT_FILE__ "rom.hex"
 `endif
-`endif
 
 `ifndef __ROM_INIT_FILE__
 `define __ROM_INIT_FILE__ ""

rtl/tb/HydrogenSoC_tb.v

@@ -1,49 +1,59 @@
 `default_nettype none
-`timescale 1ns/1ps
 
-`include "../HydrogenSoC_Config.vh"
+`include "HydrogenSoC_Config.vh"
 
 module isim_tb;
-reg clk_i = 0;
-reg rst_i = 1;
-
-wire [`NGPIO-1:0] gpio_io;
-
-// UART
-reg uart_usb_rx_i = 0;
-wire uart_usb_tx_o;
-
-reg  uart_io_rx_i = 0;
-wire uart_io_tx_o;
-
-// UART MUX
-reg uart_mux_sel = 0;
-
-// TEST POINTS
-wire uart_rx_test_point_o;
-wire uart_tx_test_point_o;
-
-HydrogenSoC hsoc (
-    clk_i,
-    rst_i,
-    gpio_io,
-    uart_usb_rx_i,
-    uart_usb_tx_o,
-    uart_io_rx_i,
-    uart_io_tx_o,
-    uart_mux_sel,
-    uart_rx_test_point_o,
-    uart_tx_test_point_o
-);
-
-
-initial begin
-    #10;
-    rst_i = 0;
-end
-
-always begin
-    #1;
-    clk_i <= ~clk_i;
-end
+    reg clk_i = 0;
+    reg rst_i = 1;
+
+    // GPIO
+    wire [`NGPIO-1:0] gpio_io;
+
+    // UART
+    reg     uart_mux_sel_i = 0;
+    reg     uart_usb_rx_i = 0;
+    wire    uart_usb_tx_o;
+    reg     uart_io_rx_i = 0;
+    wire    uart_io_tx_o;
+
+    // SPI
+    reg     spi_miso_i = 0;
+    wire    spi_mosi_o;
+    wire    spi_sck_o;
+    wire    spi_cs_o;
+
+    // DUT    
+    HydrogenSoC hosc(
+        clk_i,
+        rst_i,
+        gpio_io,
+        uart_mux_sel_i,
+        uart_usb_rx_i,
+        uart_usb_tx_o,
+        uart_io_rx_i,
+        uart_io_tx_o,
+        spi_miso_i,
+        spi_mosi_o,
+        spi_sck_o,
+        spi_cs_o
+    );
+
+    initial begin
+        $dumpfile("trace.vcd");
+        $dumpvars(0, isim_tb);
+        #10;
+        rst_i = 0;
+    end
+
+    reg [63:0] clk_ctr = 0;
+    always @(posedge clk_i) begin
+        clk_ctr <= clk_ctr + 1;
+
+        if(clk_ctr == 200000)
+            $finish(0);
+    end
+
+    always begin
+        #1; clk_i <= ~clk_i;
+    end
 endmodule

rtl/tb/Makefile

@@ -0,0 +1,39 @@
+rtl_dir = $(RVATOM)/rtl
+
+VFLAGS = -Wall
+VFLAGS += -I$(RVATOM)/rtl/soc/hydrogensoc -I$(RVATOM)/rtl/common -I$(RVATOM)/rtl/core
+VFLAGS += -D__ROM_INIT_FILE__='"$(RVATOM)/sw/flashboot/rom.hex"'
+
+VSRCS  = $(rtl_dir)/tb/HydrogenSoC_tb.v
+VSRCS += $(rtl_dir)/soc/hydrogensoc/HydrogenSoC.v
+VSRCS += $(rtl_dir)/core/AtomRV.v
+VSRCS += $(rtl_dir)/core/Alu.v
+VSRCS += $(rtl_dir)/core/Decode.v
+VSRCS += $(rtl_dir)/core/RegisterFile.v
+VSRCS += $(rtl_dir)/core/CSR_Unit.v
+VSRCS += $(rtl_dir)/core/AtomRV_wb.v 
+VSRCS += $(rtl_dir)/uncore/wishbone/Arbiter.v
+VSRCS += $(rtl_dir)/uncore/wishbone/Arbiter3_wb.v
+VSRCS += $(rtl_dir)/uncore/wishbone/Crossbar5_wb.v
+VSRCS += $(rtl_dir)/uncore/wishbone/Priority_encoder.v
+VSRCS += $(rtl_dir)/uncore/gpio/IOBuf.v
+VSRCS += $(rtl_dir)/uncore/gpio/GPIO.v
+VSRCS += $(rtl_dir)/uncore/mem/DualPortRAM_wb.v
+VSRCS += $(rtl_dir)/uncore/mem/SinglePortROM_wb.v
+VSRCS += $(rtl_dir)/uncore/mem/SinglePortRAM_wb.v
+VSRCS += $(rtl_dir)/uncore/uart/UART.v
+VSRCS += $(rtl_dir)/uncore/uart/UART_core.v
+VSRCS += $(rtl_dir)/uncore/spi/SPI_wb.v
+VSRCS += $(rtl_dir)/uncore/spi/SPI_core.v
+
+default: trace.vcd
+
+trace.vcd: out.vvp
+	vvp out.vvp
+
+out.vvp: $(VSRCS)
+	iverilog $(VFLAGS) -o $@ $^
+
+.PHONY: clean
+clean:
+	rm -f *.vvp *.vcd

rtl/uncore/mem/SinglePortROM_wb.v

@@ -35,8 +35,8 @@ module SinglePortROM_wb #(
 
     // Set Ack_o
     always @(posedge wb_clk_i) begin
-        if(wb_rst_i)
-            wb_ack_o <= 0;
+        if (wb_rst_i)
+            wb_ack_o <= 1'b0;
         else
             wb_ack_o <= wb_stb_i & !wb_ack_o;
     end

rtl/uncore/wishbone/Crossbar5_wb.v

@@ -224,16 +224,16 @@ module Crossbar5_wb #(
 
     // Error signal
     wire select_error = (selected_device == DEVICE_NONE);
-    always begin
+    always @(*) begin
         if (select_error) begin 
             `debug($display("XBAR-SEL-ERR: Unknown Device Selected: 0x%x", wbs_adr_i);) 
         end
     end
 
-    assign wbs_err_o = select_error
+    assign wbs_err_o = wbs_cyc_i & (select_error
                         | wbm0_err_i
                         | wbm1_err_i
                         | wbm2_err_i
                         | wbm3_err_i
-                        | wbm4_err_i;
+                        | wbm4_err_i);
 endmodule

rtl/uncore/wishbone/wb_crossbar_gen.py

@@ -186,15 +186,15 @@ def generate(nslaves=2, name=None, output=None):
                  
     // Error signal
     wire select_error = (selected_device == DEVICE_NONE);
-    always begin
+    always @(*) begin
         if (select_error) begin 
             `debug($display("XBAR-SEL-ERR: Unknown Device Selected: 0x%x", wbs_adr_i);) 
         end
     end
     
-    assign wbs_err_o = select_error
+    assign wbs_err_o = wbs_cyc_i & (select_error
                         {%- for p in nslaves %}
-                        | wbm{{p}}_err_i{%- if p == lastslave%};{%- endif %}
+                        | wbm{{p}}_err_i{%- if p == lastslave%});{%- endif %}
                         {%- endfor %}
 endmodule
 

sw/bootloader/Makefile

@@ -2,17 +2,18 @@ EXEC:= bootloader.elf
 
 CFLAGS:= -mabi=ilp32 -march=rv32i -nostartfiles -ffreestanding -DTARGET_HYDROGENSOC -Os
 CFLAGS+= -I $(RVATOM_LIB)/include
-LFLAGS:= -L $(RVATOM_LIB)/ -T link_bootloader.lds -lcatom -Xlinker -Map $(EXEC).map
+LFLAGS:= -L $(RVATOM_LIB)/ -T $(RVATOM_LIB)/link/link_boot_hydrogensoc.ld -lcatom -Xlinker -Map $(EXEC).map -Wl,--gc-sections
 
 default: boot
 
 .PHONY: boot
 boot: $(EXEC)
 
-$(EXEC): xmodem.c bootloader.c crt0.S
+$(EXEC): main.c crt0.S
 	riscv64-unknown-elf-gcc $(CFLAGS) -o $@ $^ $(LFLAGS)
 	riscv64-unknown-elf-objdump -htd $@ > $@.objdump
+	python3 $$RVATOM/scripts/convelf.py -t elf -j hydrogensoc.json --keep-temp $(EXEC) -c
 
 .PHONY: clean
 clean:
-	rm -f *.o *.objdump *.map *.elf
+	rm -f *.o *.objdump *.map *.elf *.hex

sw/bootloader/hydrogensoc.json

@@ -0,0 +1,4 @@
+{
+    "BOOTROM" :    ["0x00010000", "4096", "h", "rom.hex"],
+    "BOOTRAM" :    ["0x20008000", "16384", "h", "ram.hex"]
+}

sw/flashboot/main.c → sw/bootloader/main.c

@@ -7,11 +7,15 @@
 #include "spi.h"
 
 //--------------------- Settings -----------------------------
+#define BOOTLED_PIN 0
+#define BOOTMODE_PIN0 8
+#define BOOTMODE_PIN1 9
+
 // Address offset at which image resides
 #define FLASH_IMG_OFFSET    0x000c0000
 
 // Size of Image
-#define FLASH_IMG_SIZE      28 * 1024   // 28 KB
+#define FLASH_IMG_SIZE      32 * 1024       // 32 KB
 
 // Enable/Disable UART
 #define ENABLE_UART
@@ -23,7 +27,7 @@
 #define END_LED_FLASHES   1
 
 // Clear screen at start of bootloader
-#define CLS_AT_START
+// #define CLS_AT_START
 
 //------------------------------------------------------------
 #define STRINGIFY(s) #s
@@ -114,13 +118,14 @@ void flash_copy(uint8_t *buf, uint32_t addr, uint32_t len)
     spi_init(&cfg);
 }
 
+
 int main()
 {
     // ********** Initialize **********
-    // Initialize status led gpio pin
-    const int led_pin = 0;
-    gpio_setmode(led_pin, OUTPUT);
-    led_blink(led_pin, START_LED_FLASHES, 50);      // Blink LED START_LED_FLASHES times (signal entering of bootloader)
+    // Initialize GPIO
+    gpio_setmode(BOOTLED_PIN, OUTPUT);     
+    gpio_setmode(BOOTMODE_PIN0, INPUT);
+    gpio_setmode(BOOTMODE_PIN1, INPUT);
 
     #ifdef ENABLE_UART
     // Initialize UART
@@ -133,26 +138,54 @@ int main()
     REG32(UART_ADDR, UART_REG_RBR);
     #endif
 
+    // Blink LED START_LED_FLASHES times (signal entering of bootloader)
+    led_blink(BOOTLED_PIN, START_LED_FLASHES, 50);
+
     // Print header
     #ifdef CLS_AT_START
     D(putchar(0x1b); putchar('c');)  // clear screen
+    #else
+    D(putchar('\n');)
     #endif
-    D(puts("***** FlashBoot *****\n");)
 
-    // ********** Read & Copy **********
-    D(puts("Copying from " EXPAND_AND_STRINGIFY(FLASH_IMG_OFFSET));)
-    flash_copy((uint8_t *)&__approm_start, FLASH_IMG_OFFSET, FLASH_IMG_SIZE);
+    D(puts("***** RISC-V Atom Bootloader *****\n");)
+
+    // get bootmode
+    uint8_t bootmode = (uint8_t)gpio_read(BOOTMODE_PIN0)
+                        | (((uint8_t)gpio_read(BOOTMODE_PIN1)) << 1);
+
+    /**
+     * Bootmode: 
+     *  0b00: flashboot
+     *  0b01: jump to ram
+     *  default: infinite loop
+    */
+    if (bootmode == 0b00) {
+        // Bootmode: flash boot
+        D(puts("flashboot: Copying from " EXPAND_AND_STRINGIFY(FLASH_IMG_OFFSET) "\n");)
+        // copy from flash
+        flash_copy((uint8_t *)&__approm_start, FLASH_IMG_OFFSET, FLASH_IMG_SIZE);
+    } else if (bootmode == 0b01) {
+        // Bootmode: jump to ram
+    } else { 
+        // Bootmode: Infinite loop
+        while(1){
+            asm volatile("");
+        }
+    }
+
+    D(puts("Jumping to ram\n" "----------------------------------\n");)
+
+    // Blink single (signal jump to user code)
+    led_blink(BOOTLED_PIN, END_LED_FLASHES, 50);
 
-    // ********** Jump to user application **********
-    led_blink(led_pin, END_LED_FLASHES, 50);        // Blink single (signal jump to user code)
-
-    D(puts("Jumping to user code\n");)
-    D(puts("---------------------\n");)
+    // Jump
     fnc_ptr app_main = (fnc_ptr)(&__approm_start);
     app_main();
 
     // ** UNREACHABLE **
     D(puts("Err: unreachable\n");)
+    gpio_write(BOOTLED_PIN, HIGH);
     while(1) {
         asm volatile("");
     }

sw/flashboot/Makefile → sw/bootloader_old/Makefile

@@ -1,19 +1,18 @@
-EXEC:= flashboot.elf
+EXEC:= bootloader.elf
 
 CFLAGS:= -mabi=ilp32 -march=rv32i -nostartfiles -ffreestanding -DTARGET_HYDROGENSOC -Os
 CFLAGS+= -I $(RVATOM_LIB)/include
-LFLAGS:= -L $(RVATOM_LIB)/ -T link_flashboot.lds -lcatom -Xlinker -Map $(EXEC).map -Wl,--gc-sections
+LFLAGS:= -L $(RVATOM_LIB)/ -T link_bootloader.lds -lcatom -Xlinker -Map $(EXEC).map
 
 default: boot
 
 .PHONY: boot
 boot: $(EXEC)
 
-$(EXEC): main.c crt0.S
+$(EXEC): xmodem.c bootloader.c crt0.S
 	riscv64-unknown-elf-gcc $(CFLAGS) -o $@ $^ $(LFLAGS)
 	riscv64-unknown-elf-objdump -htd $@ > $@.objdump
-	python3 $$RVATOM/scripts/convelf.py -t elf -j hydrogensoc.json --keep-temp $(EXEC) -c
 
 .PHONY: clean
 clean:
-	rm -f *.o *.objdump *.map *.elf *.hex
+	rm -f *.o *.objdump *.map *.elf

sw/flashboot/crt0.S → sw/bootloader_old/crt0.S

@@ -18,6 +18,7 @@ _start:
     # ===== Call main =====
     jal main
 
+
 _exit:
     ebreak  # Exit simulation
     j _exit