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AUDIO: Fix reverse stereo volumes on ARM
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This commit re-converts the stereo rate converters to
reverse stereo since they had drifted apart during the last few
refactoring steps.

In the process it makes vol_l/vol_r behave the same as in the C++.
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@wjp
wjp committed Oct 31, 2011
1 parent 2a7c65f commit 99307ac
Showing 1 changed file with 21 additions and 22 deletions.
43 changes: 21 additions & 22 deletions audio/rate_arm_asm.s
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Expand Up @@ -124,16 +124,16 @@ _ARM_CopyRate_R:
ORR r2, r2, r2, LSL #8 @ r2 = vol_l as 16 bits
ORR r3, r3, r3, LSL #8 @ r3 = vol_r as 16 bits
CopyRate_R_loop:
LDRSH r5, [r12],#2 @ r5 = tmp1 = *ptr++
LDRSH r4, [r12],#2 @ r4 = tmp0 = *ptr++
LDRSH r5, [r12],#2 @ r5 = tmp1 = *ptr++
LDRSH r6, [r1] @ r6 = obuf[0]
LDRSH r7, [r1,#2] @ r7 = obuf[1]
MUL r4, r2, r4 @ r4 = tmp0*vol_l
MUL r5, r3, r5 @ r5 = tmp1*vol_r
MUL r4, r2, r4 @ r5 = tmp0*vol_l
MUL r5, r3, r5 @ r6 = tmp1*vol_r

ADDS r6, r4, r6, LSL #16 @ r6 = obuf[0]<<16 + tmp0*vol_l
ADDS r6, r5, r6, LSL #16 @ r6 = obuf[0]<<16 + tmp1*vol_r
RSCVS r6, r14,#0x80000000 @ Clamp r6
ADDS r7, r5, r7, LSL #16 @ r7 = obuf[1]<<16 + tmp1*vol_r
ADDS r7, r4, r7, LSL #16 @ r7 = obuf[1]<<16 + tmp0*vol_l
RSCVS r7, r14,#0x80000000 @ Clamp r7

MOV r6, r6, LSR #16 @ Shift back to halfword
Expand Down Expand Up @@ -337,17 +337,17 @@ SimpleRate_R_loop:
ADDGE r0, r0, #4 @ if (r2 >= 0) { sr.inPtr += 2
BGE SimpleRate_R_loop @ and loop }
SimpleRate_R_read_return:
LDRSH r5, [r0],#2 @ r5 = tmp0 = *inPtr++
LDRSH r4, [r0],#2 @ r4 = tmp1 = *inPtr++
LDRSH r4, [r0],#2 @ r4 = tmp0 = *inPtr++
LDRSH r5, [r0],#2 @ r5 = tmp1 = *inPtr++
LDRSH r6, [r3] @ r6 = obuf[0]
LDRSH r7, [r3,#2] @ r7 = obuf[1]
ADD r2, r2, r8 @ r2 = opos += opos_inc
MUL r4, r12,r4 @ r5 = tmp0*vol_l
MUL r5, r14,r5 @ r6 = tmp1*vol_r

ADDS r6, r4, r6, LSL #16 @ r6 = obuf[0]<<16 + tmp0*vol_l
ADDS r6, r5, r6, LSL #16 @ r6 = obuf[0]<<16 + tmp1*vol_r
RSCVS r6, r10,#0x80000000 @ Clamp r6
ADDS r7, r5, r7, LSL #16 @ r7 = obuf[1]<<16 + tmp1*vol_r
ADDS r7, r4, r7, LSL #16 @ r7 = obuf[1]<<16 + tmp0*vol_l
RSCVS r7, r10,#0x80000000 @ Clamp r7

MOV r6, r6, LSR #16 @ Shift back to halfword
Expand All @@ -360,15 +360,14 @@ SimpleRate_R_read_return:
BGT SimpleRate_R_loop @ and loop
SimpleRate_R_end:
LDR r14,[r13,#8] @ r14 = sr
ADD r13,r13,#12 @ Skip over r0-r2 on stack
STMIA r14,{r0,r1,r2} @ Store back updated values
ADD r13,r13,#12 @ skip over r0-r2 on stack
STMIA r14,{r0,r1,r2} @ store back updated values
MOV r0, r3 @ return obuf
LDMFD r13!,{r4-r8,r10-r11,PC}
SimpleRate_R_read:
LDR r0, [r13,#8] @ r0 = sr (8 = 4*2)
ADD r0, r0, #16 @ r0 = inPtr = inBuf
STMFD r13!,{r0,r2-r3,r12,r14}

MOV r1, r0 @ r1 = inBuf
LDR r0, [r13,#20] @ r0 = AudioStream & input (20 = 4*5)
MOV r2, #512 @ r2 = ARRAYSIZE(inBuf)
Expand Down Expand Up @@ -613,39 +612,39 @@ LinearRate_R_read_return:
LDRSH r5, [r0],#2 @ r5 = tmp0 = *inPtr++
LDRSH r6, [r0],#2 @ r5 = tmp1 = *inPtr++
SUBS r8, r8, #65536 @ r8 = opos--
STRH r10,[r2,#22] @ ilast[0] = icur[0]
STRH r10,[r2,#22] @ ilast[0] = icur[0]
MOV r10,r10,LSR #16
STRH r10,[r2,#26] @ ilast[1] = icur[1]
STRH r5, [r2,#16] @ icur[0] = tmp0
STRH r6, [r2,#18] @ icur[1] = tmp1
STRH r10,[r2,#26] @ ilast[1] = icur[1]
STRH r5, [r2,#16] @ icur[0] = tmp0
STRH r6, [r2,#18] @ icur[1] = tmp1
BGE LinearRate_R_loop

@ part2 - form output samples
LinearRate_R_part2:
@ We are guaranteed that opos < 0 here
LDR r6, [r2,#20] @ r6 = ilast[0]
LDR r6, [r2,#20] @ r6 = ilast[0]<<16 + 32768
LDRSH r5, [r2,#16] @ r5 = icur[0]
MOV r4, r8, LSL #16
MOV r4, r4, LSR #16
SUB r5, r5, r6, ASR #16 @ r5 = icur[0] - ilast[0]
MLA r6, r4, r5, r6 @ r6 = (icur[0]-ilast[0])*opos_frac+ilast[0]

LDR r7, [r2,#24] @ r7 = ilast[1]
LDR r7, [r2,#24] @ r7 = ilast[1]<<16 + 32768
LDRSH r5, [r2,#18] @ r5 = icur[1]
LDR r10,[r3] @ r10= obuf[0]
LDRSH r10,[r3,#2] @ r10= obuf[1]
MOV r6, r6, ASR #16 @ r6 = tmp1 >>= 16
SUB r5, r5, r7, ASR #16 @ r5 = icur[1] - ilast[1]
MLA r7, r4, r5, r7 @ r7 = (icur[1]-ilast[1])*opos_frac+ilast[1]

LDRSH r5, [r3,#2] @ r5 = obuf[1]
LDRSH r5, [r3] @ r5 = obuf[0]
MOV r7, r7, ASR #16 @ r7 = tmp0 >>= 16
MUL r7, r12,r7 @ r7 = tmp0*vol_l
MUL r6, r14,r6 @ r6 = tmp1*vol_r

ADDS r7, r7, r10, LSL #16 @ r7 = obuf[0]<<16 + tmp0*vol_l
ADDS r7, r7, r10, LSL #16 @ r7 = obuf[1]<<16 + tmp0*vol_l
MOV r4, #0
RSCVS r7, r4, #0x80000000 @ Clamp r7
ADDS r6, r6, r5, LSL #16 @ r6 = obuf[1]<<16 + tmp1*vol_r
ADDS r6, r6, r5, LSL #16 @ r6 = obuf[0]<<16 + tmp1*vol_r
RSCVS r6, r4, #0x80000000 @ Clamp r6

MOV r7, r7, LSR #16 @ Shift back to halfword
Expand Down

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