Changed to synch reset.

secworks · May 27, 2016 · 162ccb9 · 162ccb9
1 parent bd54850
commit 162ccb9
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/src/rtl/siphash.v b/src/rtl/siphash.v
@@ -192,7 +192,7 @@ module siphash(
   // All registers are positive edge triggered with
   // asynchronous active low reset.
   //----------------------------------------------------------------
-  always @ (posedge clk or negedge reset_n)
+  always @ (posedge clk)
     begin
       if (!reset_n)
         begin

diff --git a/src/rtl/siphash_core.v b/src/rtl/siphash_core.v
@@ -150,7 +150,7 @@ module siphash_core(
   // All registers are positive edge triggered with
   // asynchronous active low reset.
   //----------------------------------------------------------------
-  always @ (posedge clk or negedge reset_n)
+  always @ (posedge clk)
     begin
       if (!reset_n)
         begin