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[*] minor syntax changes in systemc
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sergeykhbr committed Dec 21, 2023
1 parent a3589d9 commit adefeb9
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Showing 26 changed files with 138 additions and 138 deletions.
30 changes: 15 additions & 15 deletions sc/prj/common/vips/sdcard/vip_sdcard_cmdio.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -300,23 +300,23 @@ void vip_sdcard_cmdio::comb() {
v.bitcnt = 7;
vb_cmd_txshift = ~0ull;
vb_cmd_txshift[47] = 0;
vb_cmd_txshift[46] = i_stat_err_parameter.read();
vb_cmd_txshift[45] = i_stat_err_address.read();
vb_cmd_txshift[44] = i_stat_err_erase_sequence.read();
vb_cmd_txshift[43] = r.cmd_req_crc_err.read();
vb_cmd_txshift[42] = i_stat_illegal_cmd.read();
vb_cmd_txshift[41] = i_stat_erase_reset.read();
vb_cmd_txshift[40] = i_stat_idle_state.read();
vb_cmd_txshift[46] = i_stat_err_parameter;
vb_cmd_txshift[45] = i_stat_err_address;
vb_cmd_txshift[44] = i_stat_err_erase_sequence;
vb_cmd_txshift[43] = r.cmd_req_crc_err;
vb_cmd_txshift[42] = i_stat_illegal_cmd;
vb_cmd_txshift[41] = i_stat_erase_reset;
vb_cmd_txshift[40] = i_stat_idle_state;
if (i_cmd_resp_r2.read() == 1) {
v.bitcnt = 15;
vb_cmd_txshift[39] = i_stat_out_of_range.read();
vb_cmd_txshift[38] = i_stat_erase_param.read();
vb_cmd_txshift[37] = i_stat_wp_violation.read();
vb_cmd_txshift[36] = i_stat_ecc_failed.read();
vb_cmd_txshift[35] = i_stat_err_cc.read();
vb_cmd_txshift[34] = i_stat_err.read();
vb_cmd_txshift[33] = i_stat_wp_erase_skip.read();
vb_cmd_txshift[32] = i_stat_locked.read();
vb_cmd_txshift[39] = i_stat_out_of_range;
vb_cmd_txshift[38] = i_stat_erase_param;
vb_cmd_txshift[37] = i_stat_wp_violation;
vb_cmd_txshift[36] = i_stat_ecc_failed;
vb_cmd_txshift[35] = i_stat_err_cc;
vb_cmd_txshift[34] = i_stat_err;
vb_cmd_txshift[33] = i_stat_wp_erase_skip;
vb_cmd_txshift[32] = i_stat_locked;
} else if ((i_cmd_resp_r3.read() == 1) || (i_cmd_resp_r7.read() == 1)) {
v.bitcnt = 39;
vb_cmd_txshift(39, 8) = i_cmd_resp_data32;
Expand Down
6 changes: 3 additions & 3 deletions sc/prj/common/vips/sdcard/vip_sdcard_ctrl.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -221,7 +221,7 @@ void vip_sdcard_ctrl::comb() {
v.ocr_vdd_window = (i_cmd_req_data.read()(23, 0) & CFG_SDCARD_VDD_VOLTAGE_WINDOW_);
v.cmd_resp_valid = 1;
v.delay_cnt = 20;
vb_resp_data32[31] = r.powerup_done.read();
vb_resp_data32[31] = r.powerup_done;
vb_resp_data32[30] = (i_cmd_req_data.read()[30] & CFG_SDCARD_HCS_);
vb_resp_data32(23, 0) = (i_cmd_req_data.read()(23, 0) & CFG_SDCARD_VDD_VOLTAGE_WINDOW_);
if ((i_cmd_req_data.read()(23, 0) & CFG_SDCARD_VDD_VOLTAGE_WINDOW_) == 0) {
Expand All @@ -238,8 +238,8 @@ void vip_sdcard_ctrl::comb() {
v.delay_cnt = 20;
if (i_spi_mode.read() == 1) {
vb_resp_data32 = 0;
vb_resp_data32[31] = r.powerup_done.read();
vb_resp_data32[30] = r.ocr_hcs.read();
vb_resp_data32[31] = r.powerup_done;
vb_resp_data32[30] = r.ocr_hcs;
vb_resp_data32(23, 0) = r.ocr_vdd_window;
} else {
v.illegal_cmd = 1;
Expand Down
2 changes: 1 addition & 1 deletion sc/prj/common/vips/spi/vip_spi_top.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -168,7 +168,7 @@ void vip_spi_top::comb() {
}
break;
case 0x04: // [0x10] uart control
rdata[0] = r.uart_loopback.read();
rdata[0] = r.uart_loopback;
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
v.uart_loopback = wb_req_wdata.read()[0];
}
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10 changes: 5 additions & 5 deletions sc/rtl/misclib/apb_ddr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -135,16 +135,16 @@ void apb_ddr::comb() {
// Registers access:
switch (wb_req_addr.read()(11, 2)) {
case 0: // 0x00: clock status
vb_rdata[0] = r.pll_locked.read();
vb_rdata[1] = r.init_calib_done.read();
vb_rdata[0] = r.pll_locked;
vb_rdata[1] = r.init_calib_done;
break;
case 1: // 0x04: temperature
vb_rdata(11, 0) = r.device_temp;
break;
case 2: // 0x08: app bits
vb_rdata[0] = r.sr_active.read(); // [0]
vb_rdata[1] = r.ref_ack.read(); // [1]
vb_rdata[2] = r.zq_ack.read(); // [2]
vb_rdata[0] = r.sr_active; // [0]
vb_rdata[1] = r.ref_ack; // [1]
vb_rdata[2] = r.zq_ack; // [2]
break;
default:
break;
Expand Down
8 changes: 4 additions & 4 deletions sc/rtl/misclib/apb_prci.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -127,12 +127,12 @@ void apb_prci::comb() {
// Registers access:
switch (wb_req_addr.read()(11, 2)) {
case 0: // 0x00: pll statuses
vb_rdata[0] = i_sys_locked.read();
vb_rdata[1] = i_ddr_locked.read();
vb_rdata[0] = i_sys_locked;
vb_rdata[1] = i_ddr_locked;
break;
case 1: // 0x04: reset status
vb_rdata[0] = r.sys_nrst.read();
vb_rdata[1] = r.dbg_nrst.read();
vb_rdata[0] = r.sys_nrst;
vb_rdata[1] = r.dbg_nrst;
if (w_req_valid.read() == 1) {
if (w_req_write.read() == 1) {
// todo:
Expand Down
14 changes: 7 additions & 7 deletions sc/rtl/misclib/apb_spi.h
Original file line number Diff line number Diff line change
Expand Up @@ -540,14 +540,14 @@ void apb_spi<log2_fifosz>::comb() {
}
break;
case 0x011: // 0x44: reserved 4 (txctrl)
vb_rdata[0] = i_detected.read(); // [0] sd card inserted
vb_rdata[1] = i_protect.read(); // [1] write protect
vb_rdata[2] = i_miso.read(); // [2] miso data bit
vb_rdata[0] = i_detected; // [0] sd card inserted
vb_rdata[1] = i_protect; // [1] write protect
vb_rdata[2] = i_miso; // [2] miso data bit
vb_rdata(6, 4) = r.state; // [6:4] state machine
vb_rdata[7] = r.generate_crc.read(); // [7] Compute and generate CRC as the last Tx byte
vb_rdata[8] = r.rx_ena.read(); // [8] Receive data and write into FIFO only if rx_synced
vb_rdata[9] = r.rx_synced.read(); // [9] rx_ena=1 and start bit received
vb_rdata[10] = r.rx_data_block.read(); // [10] rx_data_block=1 receive certain template byte
vb_rdata[7] = r.generate_crc; // [7] Compute and generate CRC as the last Tx byte
vb_rdata[8] = r.rx_ena; // [8] Receive data and write into FIFO only if rx_synced
vb_rdata[9] = r.rx_synced; // [9] rx_ena=1 and start bit received
vb_rdata[10] = r.rx_data_block; // [10] rx_data_block=1 receive certain template byte
vb_rdata(31, 16) = r.ena_byte_cnt; // [31:16] Number of bytes to transmit
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
v.generate_crc = wb_req_wdata.read()[7];
Expand Down
20 changes: 10 additions & 10 deletions sc/rtl/misclib/apb_uart.h
Original file line number Diff line number Diff line change
Expand Up @@ -547,9 +547,9 @@ void apb_uart<log2_fifosz>::comb() {
}
break;
case 2: // 0x08: txctrl
vb_rdata[0] = r.tx_ena.read(); // [0] tx ena
vb_rdata[1] = r.tx_nstop.read(); // [1] Number of stop bits
vb_rdata[2] = r.tx_par.read(); // [2] parity bit enable
vb_rdata[0] = r.tx_ena; // [0] tx ena
vb_rdata[1] = r.tx_nstop; // [1] Number of stop bits
vb_rdata[2] = r.tx_par; // [2] parity bit enable
vb_rdata(18, 16) = r.tx_irq_thresh.read()(2, 0); // [18:16] FIFO threshold to raise irq
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
v.tx_ena = wb_req_wdata.read()[0];
Expand All @@ -559,9 +559,9 @@ void apb_uart<log2_fifosz>::comb() {
}
break;
case 3: // 0x0C: rxctrl
vb_rdata[0] = r.rx_ena.read(); // [0] txena
vb_rdata[1] = r.rx_nstop.read(); // [1] Number of stop bits
vb_rdata[2] = r.rx_par.read();
vb_rdata[0] = r.rx_ena; // [0] txena
vb_rdata[1] = r.rx_nstop; // [1] Number of stop bits
vb_rdata[2] = r.rx_par;
vb_rdata(18, 16) = r.rx_irq_thresh.read()(2, 0);
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
v.rx_ena = wb_req_wdata.read()[0];
Expand All @@ -571,16 +571,16 @@ void apb_uart<log2_fifosz>::comb() {
}
break;
case 4: // 0x10: ie
vb_rdata[0] = r.tx_ie.read();
vb_rdata[1] = r.rx_ie.read();
vb_rdata[0] = r.tx_ie;
vb_rdata[1] = r.rx_ie;
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
v.tx_ie = wb_req_wdata.read()[0];
v.rx_ie = wb_req_wdata.read()[1];
}
break;
case 5: // 0x14: ip
vb_rdata[0] = r.tx_ip.read();
vb_rdata[1] = r.rx_ip.read();
vb_rdata[0] = r.tx_ip;
vb_rdata[1] = r.rx_ip;
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
v.tx_ip = wb_req_wdata.read()[0];
v.rx_ip = wb_req_wdata.read()[1];
Expand Down
14 changes: 7 additions & 7 deletions sc/rtl/misclib/plic.h
Original file line number Diff line number Diff line change
Expand Up @@ -260,7 +260,7 @@ void plic<ctxmax, irqmax>::comb() {
if ((r.pending.read()[i] == 1)
&& (r.ctx[n].ie[i] == 1)
&& (r.src_priority.read()((4 * i) + 4 - 1, (4 * i)).to_int() > r.ctx[n].priority_th)) {
vb_ctx[n].ip_prio((4 * i) + 4- 1, (4 * i)) = r.src_priority.read()((4 * i) + 4 - 1, (4 * i));
vb_ctx[n].ip_prio((4 * i) + 4 - 1, (4 * i)) = r.src_priority.read()((4 * i) + 4 - 1, (4 * i));
vb_ctx[n].prio_mask[r.src_priority.read()((4 * i) + 4 - 1, (4 * i)).to_int()] = 1;
}
}
Expand Down Expand Up @@ -301,26 +301,26 @@ void plic<ctxmax, irqmax>::comb() {
vrdata(3, 0) = r.src_priority.read()((8 * wb_req_addr.read()(11, 3)) + 4 - 1, (8 * wb_req_addr.read()(11, 3))).to_uint64();
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
if (wb_req_wstrb.read()(3, 0).or_reduce() == 1) {
vb_src_priority((8 * wb_req_addr.read()(11, 3)) + 4- 1, (8 * wb_req_addr.read()(11, 3))) = wb_req_wdata.read()(3, 0);
vb_src_priority((8 * wb_req_addr.read()(11, 3)) + 4 - 1, (8 * wb_req_addr.read()(11, 3))) = wb_req_wdata.read()(3, 0);
}
}
}

vrdata(35, 32) = r.src_priority.read()(((8 * wb_req_addr.read()(11, 3)) + 32) + 4 - 1, ((8 * wb_req_addr.read()(11, 3)) + 32)).to_uint64();
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
if (wb_req_wstrb.read()(7, 4).or_reduce() == 1) {
vb_src_priority(((8 * wb_req_addr.read()(11, 3)) + 32) + 4- 1, ((8 * wb_req_addr.read()(11, 3)) + 32)) = wb_req_wdata.read()(35, 32);
vb_src_priority(((8 * wb_req_addr.read()(11, 3)) + 32) + 4 - 1, ((8 * wb_req_addr.read()(11, 3)) + 32)) = wb_req_wdata.read()(35, 32);
}
}
} else if (wb_req_addr.read()(21, 12) == 1) {
// 0x001000..0x001080
vrdata = r.pending.read()((64 * wb_req_addr.read()(6, 3)) + 64 - 1, (64 * wb_req_addr.read()(6, 3))).to_uint64();
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
if (wb_req_wstrb.read()(3, 0).or_reduce() == 1) {
vb_pending((64 * wb_req_addr.read()(6, 3)) + 32- 1, (64 * wb_req_addr.read()(6, 3))) = wb_req_wdata.read()(31, 0);
vb_pending((64 * wb_req_addr.read()(6, 3)) + 32 - 1, (64 * wb_req_addr.read()(6, 3))) = wb_req_wdata.read()(31, 0);
}
if (wb_req_wstrb.read()(7, 4).or_reduce() == 1) {
vb_pending(((64 * wb_req_addr.read()(6, 3)) + 32) + 32- 1, ((64 * wb_req_addr.read()(6, 3)) + 32)) = wb_req_wdata.read()(63, 32);
vb_pending(((64 * wb_req_addr.read()(6, 3)) + 32) + 32 - 1, ((64 * wb_req_addr.read()(6, 3)) + 32)) = wb_req_wdata.read()(63, 32);
}
}
} else if ((wb_req_addr.read()(21, 12) == 2)
Expand All @@ -330,10 +330,10 @@ void plic<ctxmax, irqmax>::comb() {
vrdata = r.ctx[wb_req_addr.read()(11, 7)].ie((64 * wb_req_addr.read()(6, 3)) + 64 - 1, (64 * wb_req_addr.read()(6, 3))).to_uint64();
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
if (wb_req_wstrb.read()(3, 0).or_reduce() == 1) {
vb_ctx[wb_req_addr.read()(11, 7)].ie((64 * wb_req_addr.read()(6, 3)) + 32- 1, (64 * wb_req_addr.read()(6, 3))) = wb_req_wdata.read()(31, 0);
vb_ctx[wb_req_addr.read()(11, 7)].ie((64 * wb_req_addr.read()(6, 3)) + 32 - 1, (64 * wb_req_addr.read()(6, 3))) = wb_req_wdata.read()(31, 0);
}
if (wb_req_wstrb.read()(7, 4).or_reduce() == 1) {
vb_ctx[wb_req_addr.read()(11, 7)].ie(((64 * wb_req_addr.read()(6, 3)) + 32) + 32- 1, ((64 * wb_req_addr.read()(6, 3)) + 32)) = wb_req_wdata.read()(63, 32);
vb_ctx[wb_req_addr.read()(11, 7)].ie(((64 * wb_req_addr.read()(6, 3)) + 32) + 32 - 1, ((64 * wb_req_addr.read()(6, 3)) + 32)) = wb_req_wdata.read()(63, 32);
}
}
} else if ((wb_req_addr.read()(21, 12) >= 0x200) && (wb_req_addr.read()(20, 12) < ctxmax)) {
Expand Down
4 changes: 2 additions & 2 deletions sc/rtl/riscv_soc.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -461,9 +461,9 @@ void riscv_soc::comb() {
// assign interrupts:
vb_ext_irqs(22, 0) = 0;
vb_ext_irqs(((23 + SOC_GPIO0_WIDTH) - 1), 23) = wb_irq_gpio;// FU740: 16 bits, current 12-bits
vb_ext_irqs[39] = w_irq_uart1.read();
vb_ext_irqs[39] = w_irq_uart1;
vb_ext_irqs(69, 40) = 0;
vb_ext_irqs[70] = w_irq_pnp.read();
vb_ext_irqs[70] = w_irq_pnp;
vb_ext_irqs((SOC_PLIC_IRQ_TOTAL - 1), 71) = 0;
wb_ext_irqs = vb_ext_irqs;

Expand Down
8 changes: 4 additions & 4 deletions sc/rtl/riverlib/cache/dcache_lru.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -334,21 +334,21 @@ void DCacheLru::comb() {

for (int i = 0; i < 8; i++) {
if (r.req_wstrb.read()[i] == 1) {
vb_req_mask((8 * i) + 8- 1, (8 * i)) = 0xFF;
vb_req_mask((8 * i) + 8 - 1, (8 * i)) = 0xFF;
}
}

vb_line_rdata_o_modified = line_rdata_o;
vb_cache_line_i_modified = r.cache_line_i;
for (int i = 0; i < (L1CACHE_BYTES_PER_LINE / 8); i++) {
if (i == ridx.to_int()) {
vb_line_rdata_o_modified((64 * i) + 64- 1, (64 * i)) = ((vb_line_rdata_o_modified((64 * i) + 64 - 1, (64 * i))
vb_line_rdata_o_modified((64 * i) + 64 - 1, (64 * i)) = ((vb_line_rdata_o_modified((64 * i) + 64 - 1, (64 * i))
& (~vb_req_mask))
| (r.req_wdata.read() & vb_req_mask));
vb_cache_line_i_modified((64 * i) + 64- 1, (64 * i)) = ((vb_cache_line_i_modified((64 * i) + 64 - 1, (64 * i))
vb_cache_line_i_modified((64 * i) + 64 - 1, (64 * i)) = ((vb_cache_line_i_modified((64 * i) + 64 - 1, (64 * i))
& (~vb_req_mask))
| (r.req_wdata.read() & vb_req_mask));
vb_line_rdata_o_wstrb((8 * i) + 8- 1, (8 * i)) = r.req_wstrb;
vb_line_rdata_o_wstrb((8 * i) + 8 - 1, (8 * i)) = r.req_wstrb;
}
}

Expand Down
8 changes: 4 additions & 4 deletions sc/rtl/riverlib/cache/lrunway.h
Original file line number Diff line number Diff line change
Expand Up @@ -116,18 +116,18 @@ void lrunway<abits, waybits>::comb() {

// init table value
for (int i = 0; i < WAYS_TOTAL; i++) {
vb_tbl_wdata_init((i * waybits) + waybits- 1, (i * waybits)) = i;
vb_tbl_wdata_init((i * waybits) + waybits - 1, (i * waybits)) = i;
}

// LRU next value, last used goes on top
vb_tbl_wdata_up = wb_tbl_rdata;
if (wb_tbl_rdata((LINE_WIDTH - waybits) + waybits - 1, (LINE_WIDTH - waybits)) != i_lru.read()) {
vb_tbl_wdata_up((LINE_WIDTH - waybits) + waybits- 1, (LINE_WIDTH - waybits)) = i_lru;
vb_tbl_wdata_up((LINE_WIDTH - waybits) + waybits - 1, (LINE_WIDTH - waybits)) = i_lru;
shift_ena_up = 1;

for (int i = (WAYS_TOTAL - 2); i >= 0; i--) {
if (shift_ena_up == 1) {
vb_tbl_wdata_up((i * waybits) + waybits- 1, (i * waybits)) = wb_tbl_rdata(((i + 1) * waybits) + waybits - 1, ((i + 1) * waybits));
vb_tbl_wdata_up((i * waybits) + waybits - 1, (i * waybits)) = wb_tbl_rdata(((i + 1) * waybits) + waybits - 1, ((i + 1) * waybits));
if (wb_tbl_rdata((i * waybits) + waybits - 1, (i * waybits)) == i_lru.read()) {
shift_ena_up = 0;
}
Expand All @@ -143,7 +143,7 @@ void lrunway<abits, waybits>::comb() {

for (int i = 1; i < WAYS_TOTAL; i++) {
if (shift_ena_down == 1) {
vb_tbl_wdata_down((i * waybits) + waybits- 1, (i * waybits)) = wb_tbl_rdata(((i - 1) * waybits) + waybits - 1, ((i - 1) * waybits));
vb_tbl_wdata_down((i * waybits) + waybits - 1, (i * waybits)) = wb_tbl_rdata(((i - 1) * waybits) + waybits - 1, ((i - 1) * waybits));
if (wb_tbl_rdata((i * waybits) + waybits - 1, (i * waybits)) == i_lru.read()) {
shift_ena_down = 0;
}
Expand Down
6 changes: 3 additions & 3 deletions sc/rtl/riverlib/core/bp_btb.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -105,17 +105,17 @@ void BpBTB::comb() {
}

vb_addr((RISCV_ARCH - 1), 0) = i_bp_pc;
vb_bp_exec[0] = i_e.read();
vb_bp_exec[0] = i_e;

for (int i = 1; i < CFG_BP_DEPTH; i++) {
t_addr = vb_addr(((i - 1) * RISCV_ARCH) + RISCV_ARCH - 1, ((i - 1) * RISCV_ARCH));
for (int n = (CFG_BTB_SIZE - 1); n >= 0; n--) {
if (t_addr == r.btb[n].pc) {
vb_addr((i * RISCV_ARCH) + RISCV_ARCH- 1, (i * RISCV_ARCH)) = r.btb[n].npc;
vb_addr((i * RISCV_ARCH) + RISCV_ARCH - 1, (i * RISCV_ARCH)) = r.btb[n].npc;
vb_hit[i] = 1;
vb_bp_exec[i] = r.btb[n].exec; // Used for: Do not override by pre-decoded jumps
} else if (vb_hit[i] == 0) {
vb_addr((i * RISCV_ARCH) + RISCV_ARCH- 1, (i * RISCV_ARCH)) = (t_addr + 4);
vb_addr((i * RISCV_ARCH) + RISCV_ARCH - 1, (i * RISCV_ARCH)) = (t_addr + 4);
}
}
}
Expand Down
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