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Add SystemVerilog syntax support #1580

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SeanMcLoughlin opened this issue Mar 11, 2021 · 0 comments

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feature-request

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SeanMcLoughlin commented Mar 11, 2021

This is similar to #1535 but I'm opening a new bug because...

I have a PR I'm about to submit for this, so I can reference this issue in it
The PR is just for SystemVerilog and not VHDL

SeanMcLoughlin added the feature-request label

SeanMcLoughlin mentioned this issue

Add SystemVerilog syntax #1581

Merged

sharkdp closed this as completed

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