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Lab 2 - NAND Testing #6

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ykamo001 opened this issue Jan 31, 2017 · 2 comments
Closed

Lab 2 - NAND Testing #6

ykamo001 opened this issue Jan 31, 2017 · 2 comments

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@ykamo001
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ykamo001 commented Jan 31, 2017

lab2_nand_schem_testbench
lab2_tran_nand

I am not able to get any output when running the simulation with the capacitance loaf of 0.05p F, but if I were to remove the capacitor all together, I am able to get an output with some noise.
lab2_nand_tran_noise

Am I not using the proper element to filter correctly, or is there something wrong with my schematic?

@Cwcook2
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Cwcook2 commented Jan 31, 2017

Try to remember from the lecture review what I said about capacitors. They only allow AC signals to pass. So we should expect to see exactly what you are getting when you place the output pin after the capacitor. What we want, is to have the noise ( typically an AC signal ) pass to VSS while we get the digital signal at the ouput, ie, you need to measure the output before the capacitor.

@ykamo001
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That fixed it, and makes sense. Thank you!

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