Shorten simulation time by 5/2 for clock_gen_test.

shellreef · Jul 27, 2008 · d46c59b · d46c59b
1 parent 588d5f2
commit d46c59b
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/circuits/clock_gen_test.asc b/circuits/clock_gen_test.asc
@@ -8,4 +8,4 @@ SYMBOL tpower -64 144 R0
 SYMATTR InstName X1
 SYMBOL clock_gen 128 80 R0
 SYMATTR InstName X2
-TEXT 168 304 Left 0 !.tran 500u
+TEXT 168 304 Left 0 !.tran 200u